Other Logic ICs Model Download Search Results
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MAX6818EAP+
Analog Devices
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1 | MAX6818EAP+, Bounce Eliminator Circuit CMOS, 8-channel 20-Pin SSOP 5.5 V 2.7 V | Small Outline Packages | MAX6818EAP+ |
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SN74LVC1G99QDCURQ1
Texas Instruments
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1 | Automotive Catalog Ultra-Configurable Multi-Function Gate With 3-State Outputs | Small Outline Packages | SN74LVC1G99QDCURQ1 |
3
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SN74AUP1G99DCTT
Texas Instruments
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1 | TEXAS INSTRUMENTS - SN74AUP1G99DCTT - LOGIC, GATE MULT-FUNC CONF 3ST, 8SOIC | Small Outline Packages | SN74AUP1G99DCTT |
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SN74LVC1G97DCKR
Texas Instruments
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1 | CONFIGURABLE MULTIPLE-FUNCTION GATE | SOT23 (6-Pin) | SN74LVC1G97DCKR |
3
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NL7SZ97DFT2G
onsemi
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1 | Logic Gates FLEXIBLE CHOICE LOGIC | SOT23 (6-Pin) | NL7SZ97DFT2G |
3
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SN74LS624N
Texas Instruments
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1 | Volt control oscillator,SN74LS624N 25pcs | Dual-In-Line Packages | SN74LS624N |
3
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SN74LVC1G58DCKRE4
Texas Instruments
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1 | Multi Function Gate 1-Element 2-IN CMOS 6-Pin SC-70 T/R | SOT23 (6-Pin) | SN74LVC1G58DCKRE4 |
3
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SN74LVC1G98DBVR
Texas Instruments
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1 | Configurable Multiple-Function Gate | SOT23 (6-Pin) | SN74LVC1G98DBVR |
3
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SN74AUP1G58DCKRG4
Texas Instruments
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1 | IC CONFIG MULTI FUNCTION SC70-6 | SOT23 (6-Pin) | SN74AUP1G58DCKRG4 |
3
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SN74TVC16222ADGVR
Texas Instruments
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1 | 22-Bit Voltage Clamp | Small Outline Packages | SN74TVC16222ADGVR |
3
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SN74LVC1G98DCKR
Texas Instruments
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1 | Configurable Multiple-Function Gate | SOT23 (6-Pin) | SN74LVC1G98DCKR |
3
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SN74TVC3010PW
Texas Instruments
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1 | 10-Bit Voltage Clamp | Small Outline Packages | SN74TVC3010PW |
3
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CD74HC670EE4
Texas Instruments
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1 | Register File Single 4-CH CMOS 16-Pin PDIP Tube | Dual-In-Line Packages | CD74HC670EE4 |
3
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HCPL-9030-000E
Avago Technologies
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1 | Digital Isolators Digital Isolator (100MBd) | Dual-In-Line Packages | HCPL-9030-000E |
3
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MAX6816EUS+T
Analog Devices
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1 | Maxim MAX6816EUS+T, Bounce Eliminator Circuit, 2.7 V to 5.5 V, 4-Pin SOT-143 | Other | MAX6816EUS+T |
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SN74AUP1G57DRYR
Texas Instruments
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1 | LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE | Other | SN74AUP1G57DRYR |
3
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SN74S124D
Texas Instruments
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1 | Voltage Controlled Oscillator 50MHz, 16-Pin SOIC | Other | SN74S124D |
3
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SN74LS628N
Texas Instruments
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1 | VOLTAGE-CONTROLLED OSCILLATORS | Dual-In-Line Packages | SN74LS628N |
3
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SN74AUP1G97DRYR
Texas Instruments
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1 | LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE | Other | SN74AUP1G97DRYR |
3
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8V54816ANLG8
Renesas Electronics
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1 | The 8V54816A is a 16-port, bi-directional cross-point clock switch designed for clock distribution in MicroTCA.4 systems. It features 16 bi-directional M-LVDS ports. Each port can be individually set as input or output. Each output port can be connected to any port defined as input. Each port features switchable termination (ON: 100Ω, OFF: High impedance). Output ports can drive up to 19-inch PCB tracks with M-LVDS levels. The device is optimized for very low additive phase noise. Configuration of the devic | Quad Flat No-Lead | 8V54816ANLG8 |
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8V54816ANLG
Renesas Electronics
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1 | The 8V54816A is a 16-port, bi-directional cross-point clock switch designed for clock distribution in MicroTCA.4 systems. It features 16 bi-directional M-LVDS ports. Each port can be individually set as input or output. Each output port can be connected to any port defined as input. Each port features switchable termination (ON: 100Ω, OFF: High impedance). Output ports can drive up to 19-inch PCB tracks with M-LVDS levels. The device is optimized for very low additive phase noise. Configuration of the devic | Quad Flat No-Lead | 8V54816ANLG |
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74AUP1G58GM,115
Nexperia
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1 | 74AUP1G58 - Low-power configurable multiple function gate@en-us | Other | 74AUP1G58GM,115 |
3
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74AUP1T98GM,115
Nexperia
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1 | 74AUP1T98 - Low-power configurable gate with voltage-level translator@en-us | Other | 74AUP1T98GM,115 |
3
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674R-01ILFT
Renesas Electronics
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1 | The 674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The post divider has eight settings of 1, 2, 4, 5, 6, 7, 8, and 10; giving a maximum total divide of 5190. The A and B Dividers can be cascaded to give a maximum divide of 669510. The 674-01 supports the 673 PLL Building Block and enables the user to build a full custom PLL synt | Small Outline Packages | 674R-01ILFT |
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74AUP1T97GS,132
Nexperia
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1 | 74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us | Other | 74AUP1T97GS,132 |
3
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