Showing 25 of 552034 results
Filter by Manufacturer
| Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action |
|---|
| Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
|
7143SA35G
Renesas Electronics
|
1 | The 7143 is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML is available. | Other | 7143SA35G |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
7005S35PFG8
Renesas Electronics
|
1 | The 7005 is a high-speed 8K x 8 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. | Quad Flat Packages | 7005S35PFG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V7319S200BC
Renesas Electronics
|
1 | The 70V7319 is a high-speed 256K x 18 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. | BGA | 70V7319S200BC |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
7142SA100C
Renesas Electronics
|
1 | The 7142 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7132 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. | Ceramic Dual-In-Line Packages | 7142SA100C |
2
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71V3558S133PFG
Renesas Electronics
|
1 | The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers. | Quad Flat Packages | 71V3558S133PFG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71T75802S133BGI
Renesas Electronics
|
1 | The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers. | BGA | 71T75802S133BGI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V9179L9PFI
Renesas Electronics
|
1 | The 70V9179 is a high-speed 32K x 9 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. | Quad Flat Packages | 70V9179L9PFI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V7319S133BF
Renesas Electronics
|
1 | The 70V7319 is a high-speed 256K x 18 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. | BGA | 70V7319S133BF |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V639S10BF
Renesas Electronics
|
1 | The 70V639 is a high-speed 128K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po | BGA | 70V639S10BF |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71T75902S75BG8
Renesas Electronics
|
1 | The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. | BGA | 71T75902S75BG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71124S20YG8
Renesas Electronics
|
1 | The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71124S20YG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71321SA35TFG8
Renesas Electronics
|
1 | The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta | Quad Flat Packages | 71321SA35TFG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V657S12BF8
Renesas Electronics
|
1 | The 70V657 is a high-speed 32K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por | BGA | 70V657S12BF8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V3599S166BC8
Renesas Electronics
|
1 | The 70V3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V. | BGA | 70V3599S166BC8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70T3519S166BF8
Renesas Electronics
|
1 | The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V. | BGA | 70T3519S166BF8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71V3556SA166BGI
Renesas Electronics
|
1 | The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers. | BGA | 71V3556SA166BGI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71256SA25TPGI
Renesas Electronics
|
1 | The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. | Dual-In-Line Packages | 71256SA25TPGI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
7143SA70GB
Renesas Electronics
|
1 | The 7143 is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML is available. | Other | 7143SA70GB |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71T75802S100BGGI
Renesas Electronics
|
1 | The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers. | BGA | 71T75802S100BGGI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71V25761S183PFG
Renesas Electronics
|
1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | Quad Flat Packages | 71V25761S183PFG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
5962-8687516XA
Renesas Electronics
|
1 | The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with | Ceramic Dual-In-Line Packages | 5962-8687516XA |
2
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V7519S133BF
Renesas Electronics
|
1 | The 70V7519 is a high-speed 256K x 36 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4Kx36 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4Kx36 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. | BGA | 70V7519S133BF |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
71024S12YGI
Renesas Electronics
|
1 | The 71024 5V CMOS SRAM is organized as 128K x 8. All bidirectional inputs and outputs of the 71024 are TTL-compatible, and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71024S12YGI |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
70V658S10DRG
Renesas Electronics
|
1 | The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por | Quad Flat Packages | 70V658S10DRG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
R1RW0416DSB-2PI#D0
Renesas Electronics
|
1 | The R1RW0416DI is a 4-Mbit High-Speed static RAM organized 256-kword × 16-bit. It has realized High-Speed access time by employing CMOS process (6-transistor memory cell) and High-Speed circuit designing technology. It is most appropriate for the application which requires High-Speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. The R1RW0416DI is packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting. | Small Outline Packages | R1RW0416DSB-2PI#D0 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||