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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	2308B-2DCGI Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1DCGI Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HDCG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HDCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-4DCG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-4DCG8	3D model available Symbol and footprint available 3	1 Download Model

	2308B-1HDCG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HDCG	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HPGGI Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HPGGI	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HPGG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HPGG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1DCGI8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1DCG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1DCG	3D model available Symbol and footprint available 3	1 Download Model
	2308B-4DCG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-4DCG	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HDCGI8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HDCGI8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1DCG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1DCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCG	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HPGG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HPGG	3D model available Symbol and footprint available 3	1 Download Model

	2308B-1HDCGI Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HDCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308B-1HPGGI8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-1HPGGI8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCGI8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	PAM2308BYMAA Diodes Incorporated	1	Switching Voltage Regulators DUAL HI-EFF PWM SD DC/DC CNVTR	Small Outline No-lead	PAM2308BYMAA	3D model available Symbol and footprint available 3	1 Download Model
	IDT2308B-4DC Renesas Electronics	1	Renesas Electronics	Small Outline Packages	IDT2308B-4DC	3D model available Symbol and footprint available 3	1 Download Model
	IDT2308B-1HPG8 Renesas Electronics	1	Multiplier, Zero Delay Buffer IC 133.3MHz 1 16-SOIC (0.154", 3.90mm Width)	Small Outline Packages	IDT2308B-1HPG8	3D model available Symbol and footprint available 3	1 Download Model
	SI2308BDS-T1-E3 Vishay	1	Vishay SI2308BDS-T1-E3 N-channel MOSFET Module, 2.3 A, 60 V, 3-Pin TO-236	SOT23 (3-Pin)	SI2308BDS-T1-E3	3D model available Symbol and footprint available 3	1 Download Model
	SI2308BDS-T1-GE3 Vishay	1	SI2308BDS-T1-GE3, N-channel MOSFET Transistor 1.9 A 60 V, 3-Pin SOT-23	SOT23 (3-Pin)	SI2308BDS-T1-GE3	3D model available Symbol and footprint available 3	1 Download Model
	IDT2308B-4DC8 Renesas Electronics	1	Renesas Electronics	Small Outline Packages	IDT2308B-4DC8	3D model available Symbol and footprint available 3	1 Download Model
	TD62308BP1G(O,J) Toshiba	1	Toshiba TD62308BP1G(O,J) Quad NPN+PNP Darlington Transistor Array, 1.5 A 80 V, 16-Pin PDIP	Dual-In-Line Packages	TD62308BP1G(O,J)	3D model available Symbol and footprint available 3	1 Download Model
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