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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	2DC-G213-B52 Singatron Enterprises Co Ltd	1	dc power jack	Other	2DC-G213-B52	3D model available Symbol and footprint available 3	1 Download Model
	2DC-G213B200 Singatron Enterprises Co Ltd	1	CONN PWR JACK 2.5MM PCB	Other	2DC-G213B200	3D model available Symbol and footprint available 3	1 Download Model
	KGQ32DCG2D101FT Kyocera AVX	1	Multilayer Ceramic Capacitors MLCC - SMD/SMT	Capacitor Chip Non-polarised	KGQ32DCG2D101FT	3D model available Symbol and footprint available 3	1 Download Model
	23S08-2DCGI Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08-2DCGI	3D model available Symbol and footprint available 3	1 Download Model

	1339-2DCGI Renesas Electronics	1	The 1339 serial real-time clock (RTC) is a low-power clock/date device with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through an I2C bus. The clock/date provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicato	Small Outline Packages	1339-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCGI8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38072DCGI Renesas Electronics	1	The FCT38072 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:2 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT38072DCGI	3D model available Symbol and footprint available 3	1 Download Model
	23S08-2DCG8 Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38072DCGI8 Renesas Electronics	1	The FCT38072 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:2 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT38072DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-2DCGI8 Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-2DCG Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-2DCG	3D model available Symbol and footprint available 3	1 Download Model
	2308-2DCGI Renesas Electronics	1	The 2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308 has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the i	Small Outline Packages	2308-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-2DCGI Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308-2DCGI8 Renesas Electronics	1	The 2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308 has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the i	Small Outline Packages	2308-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	LDS6202DCGI8 Renesas Electronics	1	The LDS6202 PureTouch® capacitive touch sensor IC is a highly accurate solution for capacitive touch sensor applications, supporting a wide variety of possible touch input types including buttons, scroll wheels, and sliders. The device contains 4 capacitive sensor input pins and supports enhanced functionality including proximity-sensing and power-on touch detection.	Small Outline Packages	LDS6202DCGI8	3D model available Symbol and footprint available 3	1 Download Model

	1339-2DCGI8 Renesas Electronics	1	The 1339 serial real-time clock (RTC) is a low-power clock/date device with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through an I2C bus. The clock/date provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicato	Small Outline Packages	1339-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	2308-2DCG8 Renesas Electronics	1	The 2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308 has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the i	Small Outline Packages	2308-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCGI Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308A-2DCGI Renesas Electronics	1	The 2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308A has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308A-2DCGI	3D model available Symbol and footprint available 3	1 Download Model
	2308A-2DCG8 Renesas Electronics	1	The 2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308A has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308A-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCG Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCG	3D model available Symbol and footprint available 3	1 Download Model
	2308B-2DCG8 Renesas Electronics	1	The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308B has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308B-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
	2308A-2DCGI8 Renesas Electronics	1	The 2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308A has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308A-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	2308A-2DCG Renesas Electronics	1	The 2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308A has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the	Small Outline Packages	2308A-2DCG	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-2DCG8 Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-2DCG8	3D model available Symbol and footprint available 3	1 Download Model
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