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Image Part Number D.S Description Package Category Prices / Stock Model Action
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9DB233AGLF Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AGLF 1 Download Model
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9DB233AGILF Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AGILF 1 Download Model
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9DB233AFLF Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AFLF 1 Download Model
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9DB233AFILF Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AFILF 1 Download Model
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9DB233AFLFT Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AFLFT 1 Download Model
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9DB233AGILFT Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AGILFT 1 Download Model
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9DB233AFILFT Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AFILFT 1 Download Model
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9DB233AGLFT Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AGLFT 1 Download Model
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9DB233AFLFT Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AFLFT 0 Build or Request
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9DB233AGILFT Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AGILFT 0 Build or Request
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9DB233AGLFT Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AGLFT 0 Build or Request
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9DB233AGLF Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AGLF 0 Build or Request
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9DB233AFILFT Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AFILFT 0 Build or Request
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9DB233AFILF Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AFILF 0 Build or Request
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9DB233AFLF Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AFLF 0 Build or Request
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9DB233AGILF Integrated Device Technology Inc
1 PLL Based Clock Driver, 9DB Series, 2 True Output(s), 0 Inverted Output(s), PDSO20 9DB233AGILF 0 Build or Request
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XC6419DB23MR-G Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23MR-G 0 Build or Request
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XC6419DB23ER Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23ER 0 Build or Request
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XC6419DB23EL Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23EL 0 Build or Request
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XC6419DB23ER-G Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23ER-G 0 Build or Request
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XC6419DB23EL-G Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23EL-G 0 Build or Request
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XC6419DB23MR Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23MR 0 Build or Request
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XC6419DB23ML Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23ML 0 Build or Request
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XC6419DB23ML-G Torex Semiconductor LTD
1 Fixed Positive LDO Regulator XC6419DB23ML-G 0 Build or Request
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