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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	TS7805ICZ AT Tool Centre	0	3-Terminal Fixed Positive Voltage Regulator	Transistor Outline, Vertical	TS7805ICZ	3D model available Symbol and footprint available 3	1 Download Model
	ATSAMS70N19A-AN Microchip	1	MICROCHIP - ATSAMS70N19A-AN - ARM MCU, SAM S70 Series, SAM32 Family SAM S Series Microcontrollers, ARM Cortex-M7, 32bit, 300 MHz	Quad Flat Packages	ATSAMS70N19A-AN	3D model available Symbol and footprint available 3	1 Download Model
	ATSAMS70N19A-AN Microchip	1	MICROCHIP - ATSAMS70N19A-AN - ARM MCU, SAM S70 Series, SAM32 Family SAM S Series Microcontrollers, ARM Cortex-M7, 32bit, 300 MHz	Quad Flat Packages	ATSAMS70N19A-AN	3D model available Symbol and footprint available 3	1 Download Model
	74FCT240ATSOG Renesas Electronics	1	The 74FCT240T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT240T operates at -40C to +85C. (For Mil version, see 54FCT240T)	Small Outline Packages	74FCT240ATSOG	3D model available Symbol and footprint available 3	1 Download Model

	74FCT244ATSOG8 Renesas Electronics	1	The 74FC244T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT244T operates at -40C to +85C. (For Mil version, see 54FCT244T)	Small Outline Packages	74FCT244ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT621ATSOG8 Renesas Electronics	1	The 74FCT621T is an octal transceiver with non-inverting Open- Drain bus compatible outputs in both send and receive directions. The B bus outputs are capable of sinking 64mA providing very good capacitive drive characteristics. The 74FCT621A is designed for asynchronous two-way communication between data buses. The 74FCT621A operates at -40C to +85C	Small Outline Packages	74FCT621ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT574ATSOG8 Renesas Electronics	1	The 74FCT574T is an 8-bit register consisting of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 74FCT574T operates at -40C to +85C. (For Mil version, see 54FCT574T)	Small Outline Packages	74FCT574ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT240ATSOG8 Renesas Electronics	1	The 74FCT240T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT240T operates at -40C to +85C. (For Mil version, see 54FCT240T)	Small Outline Packages	74FCT240ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT244ATSOG Renesas Electronics	1	The 74FC244T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT244T operates at -40C to +85C. (For Mil version, see 54FCT244T)	Small Outline Packages	74FCT244ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT543ATSOG8 Renesas Electronics	1	The 74FCT543T is a non-inverting octal transceiver that contains two sets of eight D-type latches with separate input and output controls for each set. The 74FCT543T operate at -40C to +85C	Small Outline Packages	74FCT543ATSOG8	3D model not available Symbol and footprint available 2	1 Download Model
	74FCT543ATSOG Renesas Electronics	1	The 74FCT543T is a non-inverting octal transceiver that contains two sets of eight D-type latches with separate input and output controls for each set. The 74FCT543T operate at -40C to +85C	Small Outline Packages	74FCT543ATSOG	3D model not available Symbol and footprint available 2	1 Download Model
	74FCT521ATSOG Renesas Electronics	1	The IDT74FCT521T is an 8-bit identity comparator that compares two words of up to eight bits each and provides a low output when the two words match bit for bit. The expansion input IA = B also serves as an active low enable input. The 74FCT521T operates at -40C to +85C	Small Outline Packages	74FCT521ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT373ATSOG Renesas Electronics	1	The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T)	Small Outline Packages	74FCT373ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT521ATSOG8 Renesas Electronics	1	The IDT74FCT521T is an 8-bit identity comparator that compares two words of up to eight bits each and provides a low output when the two words match bit for bit. The expansion input IA = B also serves as an active low enable input. The 74FCT521T operates at -40C to +85C	Small Outline Packages	74FCT521ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT2245ATSOG8 Renesas Electronics	1	The 74FCT2245T octal bidirectional transceiver is designed for asynchronous two-way communication between data buses. The transmit/receive (T/R) input determines the direction of data flow through the bidirectional transceiver. The 74FCT2245T has balanced drive outputs with current limiting resistors reducing the need for external series terminating resistors. It is a plug-in replacement for the 74FCT245T. The 74FCT2245T operates at -40C to +85C	Small Outline Packages	74FCT2245ATSOG8	3D model available Symbol and footprint available 3	1 Download Model

	74FCT573ATSOG Renesas Electronics	1	The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).	Small Outline Packages	74FCT573ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT574ATSOG Renesas Electronics	1	The 74FCT574T is an 8-bit register consisting of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 74FCT574T operates at -40C to +85C. (For Mil version, see 54FCT574T)	Small Outline Packages	74FCT574ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT540ATSOG8 Renesas Electronics	1	The 74FCT540T octal buffer/line driver is similar in function to the FCT240T, except that the inputs and outputs are on opposite sides of the package. This pinout arrangement makes these devices especially useful as output ports for microprocessors and as backplane drivers, allowing ease of layout and greater board density. The 74FCT540T operates at -40C to +85C	Small Outline Packages	74FCT540ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT374ATSOG Renesas Electronics	1	The 74FCT374T is an 8-bit register that consists of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 74FCT374T operates at -40C to +85C. (For Mil version, see 54FCT374T)	Small Outline Packages	74FCT374ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT621ATSOG Renesas Electronics	1	The 74FCT621T is an octal transceiver with non-inverting Open- Drain bus compatible outputs in both send and receive directions. The B bus outputs are capable of sinking 64mA providing very good capacitive drive characteristics. The 74FCT621A is designed for asynchronous two-way communication between data buses. The 74FCT621A operates at -40C to +85C	Small Outline Packages	74FCT621ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT540ATSOG Renesas Electronics	1	The 74FCT540T octal buffer/line driver is similar in function to the FCT240T, except that the inputs and outputs are on opposite sides of the package. This pinout arrangement makes these devices especially useful as output ports for microprocessors and as backplane drivers, allowing ease of layout and greater board density. The 74FCT540T operates at -40C to +85C	Small Outline Packages	74FCT540ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	CRCW120624R0JNEAHP Vishay	1	s	Resistor Chip	CRCW120624R0JNEAHP	3D model available Symbol and footprint available 3	1 Download Model
	74FCT373ATSOG8 Renesas Electronics	1	The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T)	Small Outline Packages	74FCT373ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT245ATSOG Renesas Electronics	1	The 74FCT245T octal bidirectional transceiver is designed for asynchronous two way communication between data buses. The transmit/receive (T/R) input determines the direction of data flow through the bidirectional transceiver. The 74FCT245T operates at -40C to +85C. (For Mil version, see 54FCT245T)	Small Outline Packages	74FCT245ATSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT573ATSOG8 Renesas Electronics	1	The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).	Small Outline Packages	74FCT573ATSOG8	3D model available Symbol and footprint available 3	1 Download Model
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