G8NB1 Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	G8NB-1 OMRON Electronic Components	1	Power/Signal Relay		G8NB-1	3D model not available Symbol and footprint not available 0	0 Build or Request
	W632GG8NB12J Winbond	1	DDR3 SDRAM 1600MHz	BGA	W632GG8NB12J	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB15J Winbond	1	DDR3 SDRAM 1333MHz	BGA	W634GG8NB15J	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB11I Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB11I	3D model available Symbol and footprint available 3	1 Download Model

	W634GG8NB11J Winbond	1	DDR3 SDRAM 1866MHz	BGA	W634GG8NB11J	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB15J Winbond	1	DDR3 SDRAM 1333MHz	BGA	W632GG8NB15J	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB12K Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8NB12K	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB18W Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB18W	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB11K Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB11K	3D model available Symbol and footprint available 3	1 Download Model
	G8NB1DC12BYOMR1 OMRON Electronics	1	Automotive Relay SPDT (1 Form C) 12VDC Coil Through Hole , 30A , 640mW , 225 Ohms , -40C to 105C	Other	G8NB1DC12BYOMR1	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB11A Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB11A	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB12I Winbond	1	2Gb DDR3 SDRAM 1600MHz VFBGA78	BGA	W632GG8NB12I	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB12K Winbond	1	DDR3 SDRAM 1600MHz	BGA	W634GG8NB12K	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB12S Winbond	1	2Gb DDR3 SDRAM 1600MHz VFBGA78	BGA	W632GG8NB12S	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB15K Winbond	1	2Gb DDR3 SDRAM 1333MHz VFBGA78	BGA	W632GG8NB15K	3D model available Symbol and footprint available 3	1 Download Model

	W9751G8NB18J Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB18J	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB12J Winbond	1	DDR3 SDRAM 1600MHz	BGA	W634GG8NB12J	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB18K Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB18K	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB12A Winbond	1	2Gb DDR3 SDRAM 1600MHz VFBGA78	BGA	W632GG8NB12A	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB-15 Winbond	1	packagebga78	BGA	W634GG8NB-15	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB12S Winbond	1	DDR3 SDRAM 1600MHz	BGA	W631GG8NB12S	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB11A Winbond	1	2Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W632GG8NB11A	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB15A Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG8NB15A	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB12W Winbond	1	VFBGA - 78	BGA	W634GG8NB12W	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB11K Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG8NB11K	3D model available Symbol and footprint available 3	1 Download Model
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