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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	HM78D-1210330MLFTR TT Electronics	1	TT ELECTRONICS / BI TECHNOLOGIES - HM78D-1210330MLFTR - INDUCTOR, 33UH, +/-20%	Other	HM78D-1210330MLFTR	3D model available Symbol and footprint available 3	1 Download Model
	8304AMLFT Renesas Electronics	1	The 8304 is a low skew, 1-to-4 Fanout Buffer. The 8304 is characterized at full 3.3V for input (VDD), and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and part-to-part skew characteristics make the 8304 ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	8304AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	501MLFT Renesas Electronics	1	The 501 Loco™ is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, all	Small Outline Packages	501MLFT	3D model available Symbol and footprint available 3	1 Download Model
	663MLFT Renesas Electronics	1	The IDT663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the IDT674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies. The phase detector and VCO functions of the device can also be used independently. This enables the config	Small Outline Packages	663MLFT	3D model available Symbol and footprint available 3	1 Download Model

	571MLFT Renesas Electronics	1	The 571 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. IDT introduced the world standard for these devices in 1992 with the debut of the AV9170, and updated that with the 570. The 571, part of IDT's ClockBlocks™ family, was designed to operate at higher frequencies, with faster rise and fall times, and with lower phase noise. The zero delay feature means that the rising edge of the input clock	Small Outline Packages	571MLFT	3D model available Symbol and footprint available 3	1 Download Model
	553MLFT Renesas Electronics	1	The 553 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	553MLFT	3D model available Symbol and footprint available 3	1 Download Model
	512MLFT Renesas Electronics	1	The IDT512 is the most cost effective way to generate a high quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input, and is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. With a reference output, this chip plus an inexpensive crystal can replace two oscillators.	Small Outline Packages	512MLFT	3D model available Symbol and footprint available 3	1 Download Model
	SSTUB32872AHMLFT Renesas Electronics	1	Not recommended for new designs	BGA	SSTUB32872AHMLFT	3D model available Symbol and footprint available 3	1 Download Model
	8302AMLFT Renesas Electronics	1	The 8302 is a low skew, 1-to-2 LVCMOS/LVTTL Fanout Buffer. The 8302 has a single-ended clock input. The single-ended clock input accepts LVCMOS or LVTTL input levels. The 8302 features a pair of LVCMOS/LVTTL outputs. The 8302 is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and part-to-part skew characteristics make the 8302 ideal for clock distribution applications demanding well-defined performance and repeatability.	Small Outline Packages	8302AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	85311AMLFT Renesas Electronics	1	The 85311 is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The 85311 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 85311 ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	85311AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	FS32K144HAT0MLFT NXP	1	ARM Microcontrollers - MCU S32K Arm Cortex-M4F, 80 MHz, 512 Kb Flash, CAN FD, FlexIO, CSEc, LQFP48 - S32K MCUs for General Purpose	Quad Flat Packages	FS32K144HAT0MLFT	3D model available Symbol and footprint available 3	1 Download Model
	85411AMLFT Renesas Electronics	1	The 85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The 85411 is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 85411 ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	85411AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	1574BMLFT Renesas Electronics	1	The 1574B is a very high performance monolithic phaselocked loop (PLL) frequency synthesizer designed for laser engine applications. Utilizing ICS's advanced CMOS mixedmode technology, the 1574B provides a low cost solution for high-end pixel clock generation for a variety of laser engine product applications. The pixel clock output (PCLK) frequency is derived from the main clock by a programmable resettable divider. Operating frequencies are fully programmable with direct control provided for reference div	Small Outline Packages	1574BMLFT	3D model available Symbol and footprint available 3	1 Download Model
	91730AMLFT Renesas Electronics	1	LOW EMI, SPREAD MODULATING, CLOCK GENERATOR	Small Outline Packages	91730AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	252PMLFT Renesas Electronics	1	The 252 is a low cost, dual-output, field programmable clock synthesizer. The 252 can generate two output frequencies from 314 kHz to 200 MHz using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using IDT's VersaClock™ software to configure the PLL and output, the 252 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 2 selectable configuration registers. T	Small Outline Packages	252PMLFT	3D model available Symbol and footprint available 3	1 Download Model

	NV021AMLFT Renesas Electronics	1	The NV021 is a Fibre Channel Clock Generator. The NV021 uses a 25MHz crystal to synthesize 100MHz. The NV021 has excellent <2ps phase jitter performance, over the 637KHz – 10MHz integration range. The NV021 is packaged in a small 8-pin SOIC, making it ideal for use in systems with limited board space.	Small Outline Packages	NV021AMLFT	3D model available Symbol and footprint available 3	1 Download Model
	551MLFT Renesas Electronics	1	The 551 is a low cost, high-speed single input to four output clock buffer. Part of Renesas' ClockBlocksTM family, this is our lowest cost, small clock buffer. See the 552-02B for monolithic dual version of the 551 in a 20 pin QSOP. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact Renesas for all of your clocking needs.	Small Outline Packages	551MLFT	3D model available Symbol and footprint available 3	1 Download Model
	728MLFT Renesas Electronics	1	The IDT728 combines the functions of a VCXO (Voltage Controlled Crystal Oscillator) and PLL (Phase Locked Loop) frequency doubler onto a single chip. Used in conjunction with an external pullable quartz crystal, this monolithic integrated circuit replaces more costly hybrid (canned) VCXO devices. The IDT728 is designed primarily for data and clock recovery applications within end products such as set-top box receivers. The IDT728 exhibits a moderate VCXO gain of 110 ppm/V typical, when used with a high qua	Small Outline Packages	728MLFT	3D model available Symbol and footprint available 3	1 Download Model
	FS32K116LAT0MLFT NXP	1	S32K116 Arm Cortex-M0+, 48 MHz, 128 Kb Flash, CAN FD, FlexIO, CSEc security, LQFP48 - S32K MCUs for General Purpose.	Quad Flat Packages	FS32K116LAT0MLFT	3D model available Symbol and footprint available 3	1 Download Model
	1524AMLFT Renesas Electronics	1	The 1524A is a low-cost, very high-performance frequency generator and phase controlled clock synthesizer. It is perfectly suited to phase controlled clock synthesis and distribution as well as line-locked and genlocked applications. The 1524A offers two channels of clock phase controlled outputs; CLK and DPACLK. These two output channels have both 250 MHz PECL differential and 150 MHz SSTL_3 single-ended output pins. The CLK output channel has a fixed phase relationship to the PLL's input and the DPACLK us	Small Outline Packages	1524AMLFT	3D model not available Symbol and footprint available 2	1 Download Model
	514MLFT Renesas Electronics	1	The IDT 514 is the most cost effective way to generate a high quality, high frequency clock output from a 14.31818 MHz crystal or clock input, and is designed to replace crystal oscillators in many electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard, inexpensive crystal to produce output clocks up to 66.66 MHz.	Small Outline Packages	514MLFT	3D model available Symbol and footprint available 3	1 Download Model
	91718CMLFT Renesas Electronics	1	Low EMI, Spread Modulating, Clock Generator	Small Outline Packages	91718CMLFT	3D model available Symbol and footprint available 3	1 Download Model
	613MLFT Renesas Electronics	1	The IDT613 is a low cost, low phase noise, high-performance clock synthesizer for any applications that require low phase noise and low jitter. It is IDT's lowest phase noise multiplier. Using IDT's patented analog and digital Phase-Locked Loop (PLL) techniques, the chip can accept a 25 MHz crystal or clock input, and produces output clocks up to 157.5 MHz. The chip has separate power supplies for the clock outputs, allowing each output to be run at different voltages. It also allows the core of the chip t	Small Outline Packages	613MLFT	3D model available Symbol and footprint available 3	1 Download Model
	513MLFT Renesas Electronics	1	The IDT513 is the most cost effective way to generate a high quality, high frequency clock output from a 14.31818 MHz crystal or clock input, and is designed to replace crystal oscillators in many electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard, inexpensive crystal to produce output clocks up to 100 MHz.	Small Outline Packages	513MLFT	3D model available Symbol and footprint available 3	1 Download Model
	2402MLFT Renesas Electronics	1	The 2402 is a high-performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase-Locked Loop (PLL) techniques. The chip is part of IDT's ClockBlocksTM family and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. The 2402 is ideal for synchronizing outputs in	Small Outline Packages	2402MLFT	3D model available Symbol and footprint available 3	1 Download Model
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