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EP2S60F1020C3N - Intel

Description: FPGA Stratix® II Family 60440 Cells 816.99MHz 90nm Technology 1.2V 1020-Pin FC-FBGA

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EP2S60F1020C3N Details

  • Manufacturer Part Number:

    EP2S60F1020C3N

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    33 X 33 MM, 1 MM PITCH, FBGA-1020

  • HTS Code:

    8542.31.00.60

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    0

  • Clock Frequency-Max:

    717 MHz

  • Combinatorial Delay of a CLB-Max:

    4.45 ns

  • JESD-30 Code:

    S-PBGA-B1020

  • JESD-609 Code:

    e1

  • Length:

    33 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    24176

  • Number of Inputs:

    718

  • Number of Logic Cells:

    60440

  • Number of Outputs:

    710

  • Number of Terminals:

    1020

  • Operating Temperature-Max:

    85 °C

  • Organization:

    24176 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA1020,32X32,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    3.5 mm

  • Supply Voltage-Max:

    1.25 V

  • Supply Voltage-Min:

    1.15 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 90 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    33 mm

EP2S60F1020C3N Frequently Asked Questions (FAQs)

  • The EP2S60F1020C3N has an operating temperature range of 0°C to 85°C (commercial temperature range) and -40°C to 100°C (industrial temperature range).
  • You can implement a clock tree in the EP2S60F1020C3N using the FPGA's dedicated clock networks, which include global clock networks and regional clock networks. You can use the Quartus II software to design and implement the clock tree.
  • The EP2S60F1020C3N's PLLs can operate at frequencies up to 620 MHz.
  • You can configure the I/O banks of the EP2S60F1020C3N using the Quartus II software. You can specify the I/O standard, voltage, and other parameters for each I/O bank.
  • The power consumption of the EP2S60F1020C3N depends on the specific application and usage. However, the typical power consumption is around 2-3 watts. You can use the Quartus II Power Play tool to estimate the power consumption of your design.

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EP2S60F1020C3N Overview

Use the download button to access the EP2S60F1020C3N 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like EP2S6, or try a keyword search, such as Field Programmable Gate Arrays

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Part Image EP2S60F1020C3 Altera Corporation

Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA1020

Part Image EP2S60F1020C3N Altera Corporation

Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA1020

Part Image EP2S60F1020C3 Intel Corporation

Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA1020