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XC4VSX35-10FFG668I - AMD

Description: Virtex®-4 SX Field Programmable Gate Array (FPGA) IC 448 3538944 34560 668-BBGA, FCBGA

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XC4VSX35-10FFG668I - AMD PCB footprint - BGA - BGA - Flip Chip BGA (FF668)
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XC4VSX35-10FFG668I - AMD  - 3D model - BGA - Flip Chip BGA (FF668)
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XC4VSX35-10FFG668I Details

  • Manufacturer Part Number:

    XC4VSX35-10FFG668I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    LEAD FREE, FBGA-668

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    1028 MHz

  • Combinatorial Delay of a CLB-Max:

    0.2 ns

  • JESD-30 Code:

    S-PBGA-B668

  • JESD-609 Code:

    e1

  • Length:

    27 mm

  • Moisture Sensitivity Level:

    4

  • Number of CLBs:

    3840

  • Number of Inputs:

    448

  • Number of Logic Cells:

    34560

  • Number of Outputs:

    448

  • Number of Terminals:

    668

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    3840 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA668,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.85 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 90 nm

  • Terminal Finish:

    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    27 mm

XC4VSX35-10FFG668I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC4VSX35-10FFG668I is 350 MHz.
  • You can implement a DDR3 memory interface using the Memory Interface Generator (MIG) tool in Vivado Design Suite, which provides a pre-verified and optimized DDR3 interface IP core.
  • The power consumption of the XC4VSX35-10FFG668I depends on the specific design and usage. However, according to the datasheet, the typical static power consumption is around 1.2W, and the dynamic power consumption can range from 2.5W to 12.5W depending on the clock frequency and activity.
  • Yes, the XC4VSX35-10FFG668I has built-in support for high-speed serial interfaces like PCIe and SATA through its GTX transceivers, which can operate at speeds up to 6.25 Gbps.
  • You can use the Vivado Design Suite's built-in debugging tools, such as the Vivado Logic Analyzer and the Vivado Serial I/O Analyzer, to debug and verify your design. Additionally, you can use external debugging tools like Chipscope or SignalTap.

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XC4VSX35-10FFG668I Overview

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Part Image XC4VSX35-10FFG668I AMD Xilinx

Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668

Part Image XC4VSX35-10FFG668C AMD

Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668

Part Image XC4VSX35-10FF668I AMD

Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668

Part Image XC4VSX35-10FF668C AMD Xilinx

Field Programmable Gate Array, 3840 CLBs, 1028MHz, 34560-Cell, CMOS, PBGA668