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XC6SLX4-3TQG144I - AMD

Description: FPGA - Field Programmable Gate Array XC6SLX4-3TQG144I

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XC6SLX4-3TQG144I - AMD PCB footprint - Quad Flat Packages - Quad Flat Packages - TQFP (TQ144/TQG144)
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XC6SLX4-3TQG144I - AMD  - 3D model - Quad Flat Packages - TQFP (TQ144/TQG144)
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XC6SLX4-3TQG144I Details

  • Manufacturer Part Number:

    XC6SLX4-3TQG144I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    20 X 20 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    862 MHz

  • Combinatorial Delay of a CLB-Max:

    0.21 ns

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    300

  • Number of Inputs:

    102

  • Number of Logic Cells:

    3840

  • Number of Outputs:

    102

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    300 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP144,.87SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    20 mm

XC6SLX4-3TQG144I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX4-3TQG144I is 350 MHz, but it depends on the specific application and design implementation.
  • The XC6SLX4-3TQG144I has a built-in DDR3 memory controller, and you can use the Xilinx MIG (Memory Interface Generator) tool to generate the necessary IP cores and interface logic.
  • The power consumption of the XC6SLX4-3TQG144I depends on the specific design and usage, but the typical static power consumption is around 1.2W, and the dynamic power consumption can range from 2W to 10W or more, depending on the clock frequency and activity.
  • Yes, the XC6SLX4-3TQG144I has built-in transceivers that support high-speed serial interfaces like PCIe, SATA, and others, with data rates up to 6.25 Gbps.
  • You can program and configure the XC6SLX4-3TQG144I using the Xilinx ISE Design Suite or Vivado Design Suite, which provide tools for design entry, synthesis, implementation, and bitstream generation.

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XC6SLX4-3TQG144I Overview

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Part Image XC6SLX4-3TQG144C AMD

Field Programmable Gate Array, 300 CLBs, 862MHz, 3840-Cell, CMOS, PQFP144

Part Image XC6SLX4-3TQG144C AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 862MHz, 3840-Cell, CMOS, PQFP144

Part Image XC6SLX4-3TQG144I AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 862MHz, 3840-Cell, CMOS, PQFP144

Part Image XC6SLX4-3TQG144Q AMD Xilinx

Field Programmable Gate Array

Part Image XC6SLX4-3TQG144Q AMD

Field Programmable Gate Array, 300 CLBs, 862MHz, 3840-Cell, PQFP144

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