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XC6SLX45-2FGG676I - AMD

Description: IC FPGA 358 I/O 676FBGA

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PCB Footprints
XC6SLX45-2FGG676I - AMD PCB footprint - BGA - BGA - FG(G)676 (1)
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XC6SLX45-2FGG676I - AMD  - 3D model - BGA - FG(G)676 (1)
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XC6SLX45-2FGG676I Details

  • Manufacturer Part Number:

    XC6SLX45-2FGG676I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    27 X 27 MM, 1 MM PITCH, LEAD FREE, FBGA-676

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B676

  • JESD-609 Code:

    e1

  • Length:

    27 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    3411

  • Number of Inputs:

    358

  • Number of Logic Cells:

    43661

  • Number of Outputs:

    358

  • Number of Terminals:

    676

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    3411 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA676,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.44 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    27 mm

XC6SLX45-2FGG676I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX45-2FGG676I is 350 MHz.
  • You can implement a DDR3 memory interface using the Memory Interface Generator (MIG) tool in Vivado Design Suite, which provides a pre-built IP core for DDR3 interfaces.
  • The power consumption of the XC6SLX45-2FGG676I depends on the specific design and usage. However, the typical static power consumption is around 1.2W, and the dynamic power consumption can range from 1.5W to 3.5W depending on the clock frequency and activity.
  • Yes, the XC6SLX45-2FGG676I has built-in transceivers that support high-speed serial interfaces like PCIe Gen2 and SATA II.
  • You can use the ChipScope Pro tool in Vivado Design Suite to debug and test your design. Additionally, you can use the FPGA's built-in logic analyzer and debug cores to monitor and analyze your design's behavior.

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XC6SLX45-2FGG676I Overview

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XC6SLX45-2FGG676I Alternates

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Image Part Number Model
Part Image XC6SLX45-2FGG676C AMD Xilinx

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA676

Part Image XC6SLX45-2FGG676C AMD

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA676

Part Image XC6SLX45-2FG676I AMD

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA676

Part Image XC6SLX45-2FG676C AMD

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA676

Part Image XC6SLX45-2FGG676I AMD Xilinx

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA676

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