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XC6SLX45T-2CSG324C - AMD

Description: IC FPGA 190 I/O 324CSBGA

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PCB Footprints
XC6SLX45T-2CSG324C - AMD PCB footprint - BGA - BGA - CSG324
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XC6SLX45T-2CSG324C - AMD  - 3D model - BGA - CSG324
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XC6SLX45T-2CSG324C Details

  • Manufacturer Part Number:

    XC6SLX45T-2CSG324C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    CSBGA-324

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B324

  • JESD-609 Code:

    e1

  • Length:

    15 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    3411

  • Number of Inputs:

    190

  • Number of Logic Cells:

    43661

  • Number of Outputs:

    190

  • Number of Terminals:

    324

  • Operating Temperature-Max:

    85 °C

  • Organization:

    3411 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFBGA

  • Package Equivalence Code:

    BGA324,18X18,32

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.5 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    15 mm

XC6SLX45T-2CSG324C Frequently Asked Questions (FAQs)

  • The maximum operating frequency is dependent on the specific design and implementation, but the FPGA can operate up to 550 MHz.
  • Xilinx provides a DDR3 memory interface IP core that can be used to implement a DDR3 memory interface on the XC6SLX45T-2CSG324C. The IP core is available in the Vivado Design Suite.
  • The power consumption of the XC6SLX45T-2CSG324C depends on the specific design and implementation. However, Xilinx provides power estimation tools in the Vivado Design Suite to estimate power consumption.
  • Yes, the XC6SLX45T-2CSG324C is suitable for high-reliability applications, such as aerospace, defense, and industrial control systems, due to its high reliability and fault tolerance features.
  • Xilinx provides a range of security features, including bitstream encryption, secure boot, and secure key storage, to help secure designs on the XC6SLX45T-2CSG324C.

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XC6SLX45T-2CSG324C Overview

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Part Image XC6SLX45T-2CSG324I AMD

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA324

Part Image XC6SLX45T-2CSG324C AMD Xilinx

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA324

Part Image XC6SLX45T-2CSG324I AMD Xilinx

Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA324