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XC7K160T-L2FFG676I - AMD

Description: FPGA - Field Programmable Gate Array XC7K160T-L2FFG676I

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PCB Footprints
XC7K160T-L2FFG676I - AMD PCB footprint - BGA - BGA - FF676, FFG676, and FFV676 (Kintex‐7 FPGAs) Flip‐Chip BGA (1.0 mm Pitch)
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3D Models
XC7K160T-L2FFG676I - AMD  - 3D model - BGA - FF676, FFG676, and FFV676 (Kintex‐7 FPGAs) Flip‐Chip BGA (1.0 mm Pitch)
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XC7K160T-L2FFG676I Details

  • Manufacturer Part Number:

    XC7K160T-L2FFG676I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-676

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    14

  • Clock Frequency-Max:

    1818 MHz

  • Combinatorial Delay of a CLB-Max:

    0.25 ns

  • JESD-30 Code:

    S-PBGA-B676

  • JESD-609 Code:

    e1

  • Length:

    27 mm

  • Moisture Sensitivity Level:

    4

  • Number of CLBs:

    12675

  • Number of Inputs:

    400

  • Number of Outputs:

    400

  • Number of Terminals:

    676

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    12675 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA676,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    3.37 mm

  • Supply Voltage-Max:

    0.97 V

  • Supply Voltage-Min:

    0.93 V

  • Supply Voltage-Nom:

    0.95 V

  • Surface Mount:

    YES

  • Technology:

    28 nm

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    27 mm

XC7K160T-L2FFG676I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC7K160T-L2FFG676I is 500 MHz, but it depends on the specific application and design implementation.
  • You can implement DDR3 memory interface using the MIG (Memory Interface Generator) tool provided by Xilinx, which generates IP cores for DDR3 memory interfaces.
  • The power consumption of the XC7K160T-L2FFG676I depends on the specific design and usage, but the typical static power consumption is around 1.2W, and the dynamic power consumption can range from 2W to 10W or more, depending on the clock frequency and activity.
  • Yes, the XC7K160T-L2FFG676I has built-in transceivers that support high-speed serial interfaces like PCIe, SATA, and others, with data rates up to 12.5 Gbps.
  • Xilinx provides various security features, such as bitstream encryption, secure boot, and IP protection, to help secure your design on the XC7K160T-L2FFG676I.

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XC7K160T-L2FFG676I Overview

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Part Image XC7K160T-L2FFG676E AMD

Field Programmable Gate Array, 12675 CLBs, 1286MHz, 162240-Cell, CMOS, PBGA676

Part Image XC7K160T-L2FF676E AMD

Field Programmable Gate Array, 12675 CLBs, 1286MHz, 162240-Cell, CMOS, PBGA676

Part Image XC7K160T-L2FFG676E AMD Xilinx

Field Programmable Gate Array, 12675 CLBs, 162240-Cell, CMOS, PBGA676

Part Image XC7K160T-L2FFG676I AMD Xilinx

Field Programmable Gate Array, 12675 CLBs, PBGA676

Part Image XC7K160T-L2FFV676I AMD Xilinx

Field Programmable Gate Array, 12675 CLBs, PBGA676

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