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XCVU13P-2FHGB2104E - AMD

Description: Virtex® UltraScale+™ Field Programmable Gate Array (FPGA) IC 702 514867200 3780000 2104-BBGA, FCBGA

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XCVU13P-2FHGB2104E Details

  • Manufacturer Part Number:

    XCVU13P-2FHGB2104E

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-2104

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    20 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    10

  • JESD-30 Code:

    S-PBGA-B2104

  • JESD-609 Code:

    e1

  • Length:

    52.5 mm

  • Number of CLBs:

    216000

  • Number of Inputs:

    832

  • Number of Logic Cells:

    3780000

  • Number of Outputs:

    832

  • Number of Terminals:

    2104

  • Operating Temperature-Max:

    100 °C

  • Organization:

    216000 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA2104,46X46,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    4.32 mm

  • Supply Voltage-Max:

    0.876 V

  • Supply Voltage-Min:

    0.825 V

  • Supply Voltage-Nom:

    0.85 V

  • Surface Mount:

    YES

  • Technology:

    16 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    52.5 mm

XCVU13P-2FHGB2104E Frequently Asked Questions (FAQs)

  • The maximum power consumption of the XCVU13P-2FHGB2104E is approximately 25W, but it can vary depending on the specific design, clock frequency, and usage.
  • To optimize power consumption, use the Vivado Power Analysis tool, enable power gating, reduce clock frequencies, and use low-power modes when possible. Additionally, consider using the AMD Power Estimator (APE) tool to estimate power consumption early in the design cycle.
  • The maximum operating temperature of the XCVU13P-2FHGB2104E is 100°C (industrial grade) or 125°C (extended temperature range). However, it's recommended to operate the device within the recommended temperature range of 0°C to 85°C for optimal performance and reliability.
  • To ensure signal integrity, use the Vivado Design Suite to analyze and optimize signal routing, use differential signaling when possible, and follow AMD's guidelines for signal integrity and PCB design.
  • The maximum clock frequency supported by the XCVU13P-2FHGB2104E is 1.5 GHz, but it can vary depending on the specific design, clock domain, and usage.

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XCVU13P-2FHGB2104E Overview

Use the download button to access the XCVU13P-2FHGB2104E 3D model. You can still request or build the schematic symbol and PCB footprint by using the respective build or request forms on this page.
To find more CAD model downloads similar to this part, try a partial part number search, like XCVU1, or try a keyword search, such as Field Programmable Gate Arrays

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Part Image XCVU13P-2FHGB2104I AMD

Field Programmable Gate Array, 216000 CLBS, 3780000-Cell, PBGA2104

Part Image XCVU13P-2FHGB2104E AMD Xilinx

Field Programmable Gate Array, 216000 CLBS, 3780000-Cell, PBGA2104