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AFGHL50T65SQDC - onsemi

Description: Maximum Junction Temperature, Tj=175°C; Automotive Qualified; Very low switching and conduction losses; Positive temperature co-efficient; 100% of the parts are dynamically tested; Copacked with SiC schottky barrier diode; Tight parameter distribution

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PCB Footprints
AFGHL50T65SQDC - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO−247−3
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AFGHL50T65SQDC - onsemi  - 3D model - Transistor Outline, Vertical - TO−247−3
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AFGHL50T65SQDC Details

  • Manufacturer Part Number:

    AFGHL50T65SQDC

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-247-3LD

  • Manufacturer Package Code:

    340CX

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    5.35

  • Additional Feature:

    RC-IGBT

  • Collector Current-Max (IC):

    100 A

  • Collector-Emitter Voltage-Max:

    650 V

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • Gate-Emitter Thr Voltage-Max:

    6.4 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-247

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    238 W

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • Turn-off Time-Nom (toff):

    160.8 ns

  • Turn-on Time-Nom (ton):

    32 ns

  • VCEsat-Max:

    2.1 V

AFGHL50T65SQDC Frequently Asked Questions (FAQs)

  • A good PCB layout should prioritize thermal dissipation, with a solid ground plane and thermal vias. A heat sink or thermal interface material can be used to improve heat dissipation. Consult onsemi's application notes for specific guidance.
  • Implement a robust thermal management system, monitor junction temperature, and ensure proper cooling. Use a thermistor or thermal sensor to monitor temperature and implement over-temperature protection. Consult onsemi's application notes for specific guidance.
  • Use a gate driver with a high current capability and low output impedance. Ensure a low-inductance layout with short, wide traces and a solid ground plane. Consult onsemi's application notes for specific guidance on gate drive circuits and layout considerations.
  • Optimize the gate drive circuit for high-frequency operation, minimize parasitic inductance, and ensure a low-jitter clock signal. Use a high-frequency capable gate driver and ensure proper decoupling and filtering. Consult onsemi's application notes for specific guidance.
  • Follow standard ESD protection procedures, such as using an ESD wrist strap, ESD mat, and ESD-safe packaging. Handle devices by the body, not the leads, and avoid touching the die. Consult onsemi's application notes for specific guidance on ESD protection and handling procedures.

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