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FDG6320C - onsemi

Description: Gate-Source Zener for ESD ruggedness (>6kV Human Body Model). ; P-Ch -0.14 A, -25 V, RDS(ON) = 10 Ω @ VGS= -4.5 V, RDS(ON) = 13 Ω @ VGS= -2.7 V. ; Very small package outline SC70-6. ; Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). ; N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 Ω @ VGS= 4.5 V, RDS(ON) = 5.0 Ω @ VGS= 2.7 V.

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PCB Footprints
FDG6320C - onsemi PCB footprint - SOT23 (6-Pin) - SOT23 (6-Pin) - SC-88 SC70-6 CASE 419B-02 ISSUE Y
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3D Models
FDG6320C - onsemi  - 3D model - SOT23 (6-Pin) - SC-88 SC70-6 CASE 419B-02 ISSUE Y
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FDG6320C Details

  • Manufacturer Part Number:

    FDG6320C

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    SC-88-6 / SC-70-6 / SOT-363-6

  • Manufacturer Package Code:

    419B-02

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Additional Feature:

    LOGIC LEVEL COMPATIBLE

  • Configuration:

    SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    25 V

  • Drain Current-Max (ID):

    0.22 A

  • Drain-source On Resistance-Max:

    4 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PDSO-G6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL AND P-CHANNEL

  • Power Dissipation-Max (Abs):

    0.3 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FDG6320C Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. Ensure a minimum of 1 oz copper thickness and a thermal relief pattern under the device.
  • Implement a robust thermal management system, including a heat sink, thermal interface material, and a cooling fan if necessary. Monitor junction temperature and adjust the system design accordingly.
  • Monitor the device's junction temperature, drain-source voltage, and drain current. Implement over-temperature, over-voltage, and over-current protection mechanisms to prevent damage.
  • Use a dedicated gate driver IC with a high current capability (>1A) and a low output impedance. Ensure a short gate lead length and a low inductance layout to minimize ringing and oscillations.
  • Implement human body model (HBM) and charged device model (CDM) protection using TVS diodes or ESD protection arrays. Ensure a low-impedance path to ground for ESD discharge.

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FDG6320C Overview

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Part Image FDG6320C_NL Fairchild Semiconductor Corporation

Small Signal Field-Effect Transistor, 0.22A I(D), 25V, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET