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FDMS3660S - onsemi

Description: Q2: N-Channel Max rDS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A Max rDS(on) = 2.2 mΩ at VGS = 4.5 V, ID = 27 A ; Low inductance packaging shortens rise/fall times, resulting in lower switching losses ; Q1: N-Channel Max rDS(on) = 8 mΩ at VGS = 10 V, ID = 13 A Max rDS(on) = 11 mΩ at VGS = 4.5 V, ID = 11 A; MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node ringing ; RoHS Compliant

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FDMS3660S - onsemi - PCB symbol
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PCB Footprints
FDMS3660S - onsemi PCB footprint - Other - Other - FDMS3660S
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FDMS3660S - onsemi - 3D model - Other - FDMS3660S
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FDMS3660S Details

  • Manufacturer Part Number:

    FDMS3660S

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    PQFN-8

  • Package Description:

    QFN-8

  • Manufacturer Package Code:

    483AJ

  • Country Of Origin:

    Philippines

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    7.2

  • Case Connection:

    DRAIN SOURCE

  • Configuration:

    SERIES, 2 ELEMENTS WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    30 V

  • Drain Current-Max (ID):

    13 A

  • Drain-source On Resistance-Max:

    0.008 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    70 pF

  • JEDEC-95 Code:

    MO-240AA

  • JESD-30 Code:

    R-PDSO-F6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    2

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    2.5 W

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    FLAT

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FDMS3660S Frequently Asked Questions (FAQs)

  • A good PCB layout for the FDMS3660S involves keeping the input and output traces separate, using a solid ground plane, and minimizing the length of the traces to reduce parasitic inductance and capacitance. A 4-layer PCB with a dedicated power plane and a solid ground plane is recommended.
  • To ensure proper biasing, connect the VCC pin to a stable 5V power supply, and the GND pin to a solid ground plane. The EN pin should be tied to VCC or a digital signal to enable the device. The VIN pin should be connected to a stable input voltage source, and the VOUT pin should be connected to a load or a filter circuit.
  • The maximum allowable power dissipation of the FDMS3660S is 1.4W. Exceeding this limit can cause the device to overheat and potentially fail. Ensure that the device is properly heat-sinked and that the ambient temperature is within the recommended operating range.
  • To filter the output of the FDMS3660S, add a capacitor (e.g., 10uF) in parallel with the output pin (VOUT) to reduce high-frequency noise and ripple. Additionally, consider adding a low-pass filter (e.g., RC filter) to further reduce noise and ripple.
  • The recommended input voltage range for the FDMS3660S is 2.7V to 5.5V. Operating the device outside of this range may affect its performance and reliability.

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FDMS3660S Overview

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