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NGTB50N60L2WG - onsemi

Description: Extremely Efficient Trench with Field Stop Technology; TJmax = 175°C; Soft Fast Reverse Recovery Diode; Optimized for High Speed Switching; 5 s Short−Circuit Capability; These are Pb−Free Devices

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PCB Footprints
NGTB50N60L2WG - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO−247 CASE 340AM ISSUE C
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3D Models
NGTB50N60L2WG - onsemi  - 3D model - Transistor Outline, Vertical - TO−247 CASE 340AM ISSUE C
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NGTB50N60L2WG Details

  • Manufacturer Part Number:

    NGTB50N60L2WG

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    TO-247

  • Manufacturer Package Code:

    340AM

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    4 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • JESD-609 Code:

    e3

  • Terminal Finish:

    Matte Tin (Sn) - annealed

NGTB50N60L2WG Frequently Asked Questions (FAQs)

  • The maximum junction temperature (Tj) for the NGTB50N60L2WG is 150°C, as specified in the datasheet. However, it's recommended to keep the junction temperature below 125°C for reliable operation and to prevent thermal runaway.
  • To ensure proper cooling, it's essential to provide a good thermal path from the device to a heat sink or a cold plate. Use a thermal interface material (TIM) with a thermal conductivity of at least 1 W/m-K, and ensure the heat sink is designed for the maximum power dissipation of the device.
  • The recommended gate drive voltage for the NGTB50N60L2WG is between 10V and 15V. A higher gate drive voltage can reduce the switching losses, but it may also increase the gate charge and the risk of gate oxide breakdown.
  • To protect the NGTB50N60L2WG from overvoltage and overcurrent, use a voltage clamp or a transient voltage suppressor (TVS) to limit the voltage across the device. Additionally, implement overcurrent protection using a current sense resistor and a comparator or a dedicated overcurrent protection IC.
  • For optimal performance and to minimize electromagnetic interference (EMI), use a 2-layer or 4-layer PCB with a solid ground plane and a separate power plane. Keep the high-frequency loops small, and use a Kelvin connection for the gate drive signal.

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NGTB50N60L2WG Overview

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