W638GU6QB-11 - Winbond
Description: ⚫ Backward compatible to VDD, VDDQ = 1.5V ± 0.075V ⚫ Double Data Rate architecture: two data transfers per clock cycle ⚫ Eight internal banks for concurrent operation ⚫ 8 bit prefetch architecture ⚫ CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 ⚫ Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) ⚫ Programmable read burst ordering: interleaved or nibble sequential ⚫ Bi-directional, differential data strobes (DQS and DQS#) are transmitted / r
