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XC6SLX25-2CSG324C - AMD

Description: XILINX - XC6SLX25-2CSG324C - FPGA, SPARTAN-6, 226 I/O, CSBGA-324

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XC6SLX25-2CSG324C - AMD PCB footprint - BGA - BGA - 324 Ball Chip-Scale BGA (CSG324) Package,
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XC6SLX25-2CSG324C - AMD  - 3D model - BGA - 324 Ball Chip-Scale BGA (CSG324) Package,
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XC6SLX25-2CSG324C Details

  • Manufacturer Part Number:

    XC6SLX25-2CSG324C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    15 X 15 MM, 0.80 MM PITCH, LEAD FREE, BGA-324

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B324

  • JESD-609 Code:

    e1

  • Length:

    15 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    1879

  • Number of Inputs:

    226

  • Number of Logic Cells:

    24051

  • Number of Outputs:

    226

  • Number of Terminals:

    324

  • Operating Temperature-Max:

    85 °C

  • Organization:

    1879 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFBGA

  • Package Equivalence Code:

    BGA324,18X18,32

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.5 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    15 mm

XC6SLX25-2CSG324C Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX25 is 350 MHz.
  • You can implement a DDR3 interface on the XC6SLX25 using the MIG (Memory Interface Generator) tool, which generates a customized DDR3 controller IP core.
  • The power consumption of the XC6SLX25 depends on the specific application and usage. However, the typical static power consumption is around 1.2W, and the dynamic power consumption is around 2.5W at 350 MHz.
  • Yes, the XC6SLX25 is suitable for high-reliability applications, such as aerospace, defense, and industrial control systems, due to its radiation-hardened design and error correction capabilities.
  • You can use the Xilinx ChipScope Pro tool to debug and verify your design on the XC6SLX25. This tool provides real-time visibility into the FPGA's internal signals and allows you to set breakpoints and triggers.

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XC6SLX25-2CSG324C Overview

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Part Image XC6SLX25-2CSG324I AMD

Field Programmable Gate Array, 1879 CLBs, 667MHz, 24051-Cell, CMOS, PBGA324

Part Image XC6SLX25-2CSG324I AMD Xilinx

Field Programmable Gate Array, 1879 CLBs, 667MHz, 24051-Cell, CMOS, PBGA324

Part Image XC6SLX25-2CSG324C AMD Xilinx

Field Programmable Gate Array, 1879 CLBs, 667MHz, 24051-Cell, CMOS, PBGA324