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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	R1LV0108ESN-5SI#B0 Renesas Electronics	1	The R1LV0108E Series is a family of low voltage 1-Mbit static RAMs organized as 131, 072-word by 8-bit, fabricated by Renesas’s high-performance 0. 15um CMOS and TFT technologies. The R1LV0108E Series has realized higher density, higher performance and low power consumption. The R1LV0108E Series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. It has been packaged in 32-pin SOP, 32-pin TSOP and 32-pin sTSOP.	Small Outline Packages	R1LV0108ESN-5SI#B0	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S80BQ Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65703S80BQ	3D model available Symbol and footprint available 3	1 Download Model
	70V7339S166BC8 Renesas Electronics	1	The 70V7339 is a high-speed 512K x 18 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 8K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 8K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7339S166BC8	3D model available Symbol and footprint available 3	1 Download Model
	7008L25G Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Other	7008L25G	3D model available Symbol and footprint available 3	1 Download Model

	R1LV0108ESA-5SR#S0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.Renesas is the worldwide #1 Low Power SRAM supplier with a full lineup and well balanced long term support. High density and high performance RAMs using Renesas's original technology, for example the Advanced LPSRAM new memory cell concept are offered.	Small Outline Packages	R1LV0108ESA-5SR#S0	3D model available Symbol and footprint available 3	1 Download Model
	71V3557S80PFG Renesas Electronics	1	The 71V3557 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3557 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	Quad Flat Packages	71V3557S80PFG	3D model available Symbol and footprint available 3	1 Download Model
	71V65803S133BQG Renesas Electronics	1	The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65803S133BQG	3D model available Symbol and footprint available 3	1 Download Model
	R1LV0108ESN-5SI#S1 Renesas Electronics	1	The R1LV0108E Series is a family of low voltage 1-Mbit static RAMs organized as 131, 072-word by 8-bit, fabricated by Renesas’s high-performance 0. 15um CMOS and TFT technologies. The R1LV0108E Series has realized higher density, higher performance and low power consumption. The R1LV0108E Series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. It has been packaged in 32-pin SOP, 32-pin TSOP and 32-pin sTSOP.	Small Outline Packages	R1LV0108ESN-5SI#S1	3D model available Symbol and footprint available 3	1 Download Model
	7038L20PFGI Renesas Electronics	1	The 7038 is a high-speed 64K x 18 Dual-Port Static RAM designed to be used as a stand-alone 1152K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 36-bit or more word systems. This MASTER/SLAVE approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7038L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V632S7PFGI8 Renesas Electronics	1	The 71V632 3.3V CMOS SRAM is organized as 64K x 32. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz. The 71V632 SRAM contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V632S7PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S100BQG Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S100BQG	3D model available Symbol and footprint available 3	1 Download Model
	71256L45TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	RMLV1616AGSD-5S2#AC0 Renesas Electronics	1	The RMLV1616A Series is a family of 16-Mbit static RAMs organized 1, 048, 576-word × 16-bit, fabricated by Renesas’s high-performance Advanced LPSRAM technologies. The RMLV1616A Series has realized higher density, higher performance and low power consumption. The RMLV1616A Series offers low power standby power dissipation;therefore, it is suitable for battery backup systems. It is offered in 48pin TSOP (I), 52pin TSOP (II) or 48-ball fine pitch ball grid array.	Small Outline Packages	RMLV1616AGSD-5S2#AC0	3D model available Symbol and footprint available 3	1 Download Model
	71V124SA12TYGI8 Renesas Electronics	1	The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71V124SA12TYGI8	3D model available Symbol and footprint available 3	1 Download Model
	7006L17G Renesas Electronics	1	The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7006L17G	3D model available Symbol and footprint available 3	1 Download Model

	70V7599S133BC8 Renesas Electronics	1	The 70V7599 is a high-speed 128K x 36 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 2Kx36 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 2Kx36 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7599S133BC8	3D model available Symbol and footprint available 3	1 Download Model
	71V35761SA166BQG Renesas Electronics	1	The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM.	BGA	71V35761SA166BQG	3D model available Symbol and footprint available 3	1 Download Model
	71V35761SA166BQG8 Renesas Electronics	1	The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM.	BGA	71V35761SA166BQG8	3D model available Symbol and footprint available 3	1 Download Model
	M48Z58Y-70MH1F STMicroelectronics	1	5 V, 64 Kbit (8 Kb x 8) ZEROPOWER® SRAM	Small Outline Packages	M48Z58Y-70MH1F	3D model available Symbol and footprint available 3	1 Download Model
	6116LA25SOGI Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Small Outline Packages	6116LA25SOGI	3D model not available Symbol and footprint available 2	1 Download Model
	71V67903S75PFG8 Renesas Electronics	1	The 71V67903 3.3V CMOS SRAM is organized as 512K x 18. The 71V67903 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67903S75PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71V3556S100PFGI Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3556S100PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V67703S85PFGI Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67703S85PFGI	3D model available Symbol and footprint available 3	1 Download Model
	70V9079L7PFG Renesas Electronics	1	The 70V9079 is a high-speed 32K x 8 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V9079L7PFG	3D model available Symbol and footprint available 3	1 Download Model
	7132LA55PDGI Renesas Electronics	1	The 7132 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7142 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535	Dual-In-Line Packages	7132LA55PDGI	3D model available Symbol and footprint available 3	1 Download Model
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