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70V659S10BF Renesas Electronics
1 The 70V659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po BGA 70V659S10BF 1 Download Model
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71V321L35PFGI Renesas Electronics
1 The 71V321 is a high-speed 2K x 8 Dual-Port Static RAMs with internal interrupt logic for interprocessor communications. The device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Quad Flat Packages 71V321L35PFGI 1 Download Model
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5962-3829407MXA Renesas Electronics
1 The 5962-38294 (7164 SRAM) is organized as 8K x 8 and offers a reduced power standby mode. The low-power version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Ceramic Dual-In-Line Packages 5962-3829407MXA 1 Download Model
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70T651S10BFGI8 Renesas Electronics
1 The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. BGA 70T651S10BFGI8 1 Download Model
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M48Z02-200PC1 STMicroelectronics
1 NVSRAM (Non-Volatile SRAM) Memory IC 16Kbit Parallel 200 ns 24-PCDIP, CAPHAT® Other M48Z02-200PC1 1 Download Model
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7005S20G Renesas Electronics
1 The 7005 is a high-speed 8K x 8 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. Other 7005S20G 1 Download Model
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71V35761SA183BQG Renesas Electronics
1 The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM. BGA 71V35761SA183BQG 1 Download Model
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71024S12YG Renesas Electronics
1 The 71024 5V CMOS SRAM is organized as 128K x 8. All bidirectional inputs and outputs of the 71024 are TTL-compatible, and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Other 71024S12YG 1 Download Model
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M48Z35Y-70MH1E STMicroelectronics
1 NVSRAM (Non-Volatile SRAM) Memory IC 256Kbit Parallel 70 ns 28-SOH Small Outline Packages M48Z35Y-70MH1E 1 Download Model
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71T75802S133PFGI8 Renesas Electronics
1 The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers. Quad Flat Packages 71T75802S133PFGI8 1 Download Model
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71V3579S80PFGI Renesas Electronics
1 The 71V3579 3.3V CMOS SRAM is organized as 256K x 18. The 71V3579 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. Quad Flat Packages 71V3579S80PFGI 1 Download Model
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71V3556S166PFGI8 Renesas Electronics
1 The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers. Quad Flat Packages 71V3556S166PFGI8 1 Download Model
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70T633S10BF8 Renesas Electronics
1 The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. BGA 70T633S10BF8 1 Download Model
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70V3399S166BF8 Renesas Electronics
1 The 70V3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V. BGA 70V3399S166BF8 1 Download Model
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7026S20G Renesas Electronics
1 The 7026 is a high-speed 16K x 16 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available. Other 7026S20G 1 Download Model
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71V25761S200BG Renesas Electronics
1 The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. BGA 71V25761S200BG 1 Download Model
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71016S20YG8 Renesas Electronics
1 The 71016 5V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71016 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. Other 71016S20YG8 1 Download Model
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71T75802S133BGG8 Renesas Electronics
1 The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers. BGA 71T75802S133BGG8 1 Download Model
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5962-8861008ZA Renesas Electronics
1 The 5962-88610 (IDT 7133/43) is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML. Other 5962-8861008ZA 1 Download Model
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71321LA20PFG Renesas Electronics
1 The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta Quad Flat Packages 71321LA20PFG 1 Download Model
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70T651S10BCI8 Renesas Electronics
1 The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. BGA 70T651S10BCI8 1 Download Model
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71V65803S133BQI8 Renesas Electronics
1 The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM. BGA 71V65803S133BQI8 1 Download Model
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71V30L25TF Renesas Electronics
1 The 71V30 high-speed 1K x 8 Dual-Port Static RAM is designed to be used as a stand-alone 8-bit Dual-Port SRAM. It has two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Quad Flat Packages 71V30L25TF 1 Download Model
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71T75802S100BGGI8 Renesas Electronics
1 The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers. BGA 71T75802S100BGGI8 1 Download Model
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71V65703S80BQGI Renesas Electronics
1 The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM. BGA 71V65703S80BQGI 1 Download Model
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