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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71V416S12PHGI Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Small Outline Packages	71V416S12PHGI	3D model available Symbol and footprint available 3	1 Download Model
	M48T35Y-70PC1 STMicroelectronics	1	M48T35Y-70PC1, Real Time Clock, Battery Backup, Calendar, Clock, 32768B RAM, Parallel, 4.5 → 5.5 V, 28-Pin PCDIP	Dual-In-Line Packages	M48T35Y-70PC1	3D model available Symbol and footprint available 3	1 Download Model
	M48Z58Y-70PC1 STMicroelectronics	1	5 V, 64 kbit (8 kbit x 8) ZEROPOWER® SRAM	Dual-In-Line Sockets	M48Z58Y-70PC1	3D model not available Symbol and footprint available 2	1 Download Model
	71V416S10PHGI Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Small Outline Packages	71V416S10PHGI	3D model available Symbol and footprint available 3	1 Download Model

	70V658S10BC8 Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S10BC8	3D model available Symbol and footprint available 3	1 Download Model
	70T651S10BC Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S10BC	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S133BG Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S133BG	3D model available Symbol and footprint available 3	1 Download Model
	7007L15JG8 Renesas Electronics	1	The 7007 is a high-speed 32K x 8 Dual-Port Static RAM designed to be used as a stand-alone 256K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Plastic Leaded Chip Carrier	7007L15JG8	3D model not available Symbol and footprint available 2	1 Download Model
	71V67603S166PFG8 Renesas Electronics	1	The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin.	Quad Flat Packages	71V67603S166PFG8	3D model available Symbol and footprint available 3	1 Download Model
	7025S17G Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7025S17G	3D model available Symbol and footprint available 3	1 Download Model
	70V3589S166BC Renesas Electronics	1	The 70V3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3589S166BC	3D model available Symbol and footprint available 3	1 Download Model
	70V658S15BF Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S15BF	3D model available Symbol and footprint available 3	1 Download Model
	71421LA20JG8 Renesas Electronics	1	The 71421 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a "SLAVE" Dual-Port RAM together with the 71321 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode.	Plastic Leaded Chip Carrier	71421LA20JG8	3D model not available Symbol and footprint available 2	1 Download Model
	70T3599S133BFGI8 Renesas Electronics	1	The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3599S133BFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65803S100BGGI8 Renesas Electronics	1	The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65803S100BGGI8	3D model available Symbol and footprint available 3	1 Download Model

	71V3557S85PFG Renesas Electronics	1	The 71V3557 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3557 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	Quad Flat Packages	71V3557S85PFG	3D model available Symbol and footprint available 3	1 Download Model
	71V2556SA133BG8 Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2556SA133BG8	3D model available Symbol and footprint available 3	1 Download Model
	709159L9PF Renesas Electronics	1	The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent	Quad Flat Packages	709159L9PF	3D model available Symbol and footprint available 3	1 Download Model
	70V7319S133BF Renesas Electronics	1	The 70V7319 is a high-speed 256K x 18 (4Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7319S133BF	3D model available Symbol and footprint available 3	1 Download Model
	7005S35PFG8 Renesas Electronics	1	The 7005 is a high-speed 8K x 8 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Quad Flat Packages	7005S35PFG8	3D model available Symbol and footprint available 3	1 Download Model
	7164S100DB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164S100DB	3D model not available Symbol and footprint available 2	1 Download Model
	70V658S12BCI Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S12BCI	3D model available Symbol and footprint available 3	1 Download Model
	71V432S5PFGI Renesas Electronics	1	The 71V432 3.3V CMOS high-speed CacheRAM is organized as 32K x 32. The pipelined burst architecture provides cost effective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The 71V432 CacheRAM contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the CacheRAM.	Quad Flat Packages	71V432S5PFGI	3D model available Symbol and footprint available 3	1 Download Model
	70T653MS12BC8 Renesas Electronics	1	The 70T653M is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone 18874K-bit Dual-Port RAM. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T653MS12BC8	3D model available Symbol and footprint available 3	1 Download Model
	M48T08-100PC1 STMicroelectronics	1	STMicroelectronics M48T08-100PC1 NVRAM, 64kbit, 100ns 28-Pin PCDIP	Dual-In-Line Packages	M48T08-100PC1	3D model available Symbol and footprint available 3	1 Download Model
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