7-282 Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	C1206H104J3GAF7282 Yageo Group	1	SMD, MLCC, High Temperature, Ultra-Stable, Low Loss	Other	C1206H104J3GAF7282	3D model available Symbol and footprint available 3	1 Download Model
	PF2472-820RF1 Bourns	1	PF2472 820 OHM 1%	Other	PF2472-820RF1	3D model available Symbol and footprint available 3	1 Download Model
	7282L12PA8 Renesas Electronics	1	The 7282 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7282L12PA8	3D model available Symbol and footprint available 3	1 Download Model
	7282L15PAI Renesas Electronics	1	The 7282 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7282L15PAI	3D model available Symbol and footprint available 3	1 Download Model

	72825LB15PF8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PF8	3D model available Symbol and footprint available 3	1 Download Model
	ADV7282AWBCPZ Analog Devices	1	10-Bit, 4× Oversampled SDTV Video Decoder with Differential Inputs 1.71V ~ 1.89V , -40°C ~ 105°C	Quad Flat No-Lead	ADV7282AWBCPZ	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15BGG Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	BGA	72825LB15BGG	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFGI8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	C0603H102J5GAE7282 Yageo Group	1	SMD, MLCC, High Temperature, Ultra-Stable, Low Loss	Other	C0603H102J5GAE7282	3D model available Symbol and footprint available 3	1 Download Model
	690367282476 Würth Elektronik	1	WR-MM Female SMT Connector with Polarization without Latch, 24 pins, SMT, straight	Other	690367282476	3D model available Symbol and footprint available 3	1 Download Model
	CA4-7.3728-20-3050-R Aker Technology	1	Crystal,12.7mm x4.5mm,7.3728MHz,20pF.-20-70C	Other	CA4-7.3728-20-3050-R	3D model available Symbol and footprint available 3	1 Download Model
	C0603H103J3GAE7282 Yageo Group	1	SMD Indust C0G HT200C, Ceramic, 0.01 uF, 5%, 25 VDC, 62.5 VDC, 200°C, -55°C, C0G, SMD, MLCC, High Temperature, Ultra-Stable, Low Loss, 0.1 % , 100 GOhms, 3.7 mg, 0603, 1.6mm, 0.8mm, 0.8mm, 0.7mm, 0.35mm, 368, 26 Weeks, 120	Other	C0603H103J3GAE7282	3D model available Symbol and footprint available 3	1 Download Model
	72821L25TF Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L25TF	3D model available Symbol and footprint available 3	1 Download Model
	C1210H104J5GAF7282 Yageo Group	1	SMD, MLCC, High Temperature, Ultra-Stable, Low Loss	Other	C1210H104J5GAF7282	3D model available Symbol and footprint available 3	1 Download Model
	C0603H222F5GAC7282 Yageo Group	1	SMD Indust C0G HT200C, Ceramic, 2200 pF, 1%, 50 VDC, 125 VDC, 200°C, -55°C, C0G, SMD, MLCC, High Temperature, Ultra-Stable, Low Loss, 0.1 % , 100 GOhms, 3.7 mg, 0603, 1.6mm, 0.8mm, 0.8mm, 0.7mm, 0.35mm, 368, 78 Weeks, 120	Other	C0603H222F5GAC7282	3D model available Symbol and footprint available 3	1 Download Model

	C2220H362JGGAF7282 Yageo Group	1	SMD, MLCC, High Temperature, Ultra-Stable, Low Loss	Other	C2220H362JGGAF7282	3D model available Symbol and footprint available 3	1 Download Model
	PF2472-82RF1 Bourns	1	PF2472 82 OHM 1%	Other	PF2472-82RF1	3D model available Symbol and footprint available 3	1 Download Model
	TPM27282-SO1R 3Peak Incorporated	1	High Precision Operational Amplifier	Small Outline Packages	TPM27282-SO1R	3D model available Symbol and footprint available 3	1 Download Model
	ADV7282WBCPZ-M Analog Devices	1	ADV7282WBCPZ-M, Video Decoder NTSC, PAL, SECAM 1-channel 10bit- 1.8 V, 3.3 V 32-Pin LFCSP WQ	Quad Flat No-Lead	ADV7282WBCPZ-M	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PFG Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72821L10PFG Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72821L25TFI Renesas Electronics	1	The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s	Quad Flat Packages	72821L25TFI	3D model available Symbol and footprint available 3	1 Download Model
	ADV7282AWBCPZ-M-RL Analog Devices	1	10-Bit, 4× Oversampled SDTV Video Decoder with Differential Inputs 1.71V ~ 1.89V , -40°C ~ 105°C	Quad Flat No-Lead	ADV7282AWBCPZ-M-RL	3D model available Symbol and footprint available 3	1 Download Model
	DA7282-00V4C Renesas Electronics	1	The DA7282 ultra-low power haptic driver, combines custom drive sequences, on- and off-resonance, at up to 1kHz. The DA7282 drives both ERM and LRA (narrow and wideband) actuators and track resonance up to 300Hz producing highly complex click/vibration touch effects in a wide range of applications.The DA7282 differs from the DA7280 and DA7281 by providing the capability to go into a full standby mode, lowering current consumption to 5nA.Benefitst20x lower standby current, minimizing the drain on small batte	BGA	DA7282-00V4C	3D model available Symbol and footprint available 3	1 Download Model
	1728297 Phoenix Contact	1	SMKDS 1/ 3-3,81 - Printed circuit board terminal, nominal current: 10 A, rated voltage (III/2): 200 V, nominal cross section: 1 mm², number of potentials: 3, number of rows: 1, number of positions per row: 3, product range: SMKDS 1, pitch: 3.81 mm, connection method: Screw connection with tension sleeve, screw head form: L Slotted, mounting: Wave soldering, conductor/PCB connection direction: 35 °, color: green, Pin layout: Linear pinning, Solder pin [P]: 3.5 mm, number of solder pins per potenti	Other	1728297	3D model available Symbol and footprint available 3	1 Download Model
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