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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	723646L12PF8 Renesas Electronics	1	The 723646 is a 1K x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. Communication between each port may bypass the FIFOs via two mailbox registers. These devices can operate in the IDT Standard mode or First Wo	Quad Flat Packages	723646L12PF8	3D model available Symbol and footprint available 3	1 Download Model
	SL622364GECO Fischer Elektronik GmbH & Co. KG	1	male header	Other	SL622364GECO	3D model available Symbol and footprint available 3	1 Download Model
	09023646921 HARTING	1	DIN B male angled 64pin, w/ board locks, PL2	Other	09023646921	3D model available Symbol and footprint available 3	1 Download Model
	2364427-1 TE Connectivity	1	Board-to-Board, 36 Position, 1 mm [.04 in] Centerline, Vertical, Black, 11.25 mm [.44 in] Height, 8.2 mm [.32 in] Width, PCI & PCI Express Connectors	Other	2364427-1	3D model available Symbol and footprint available 3	1 Download Model

	723643L15PF8 Renesas Electronics	1	The 723643 is a 1K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723643L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	M20-7823646 Harwin	1	M20: 36 Pos Receptacle SIL Straight 3mm THT Connector 8.5mm high Tin	Other	M20-7823646	3D model available Symbol and footprint available 3	1 Download Model
	723642L12PF Renesas Electronics	1	The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723642L12PF	3D model available Symbol and footprint available 3	1 Download Model
	723641L20PF Renesas Electronics	1	The 723641 is a 1K x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723641L20PF	3D model available Symbol and footprint available 3	1 Download Model
	832-3645 Wago	1	THT male header; 1.2 x 1.2 mm solder pin; angled; 100% protected against mismating; Silver-plated contacts; Pin spacing 10.16 mm; 5-pole	Other	832-3645	3D model available Symbol and footprint available Manufacturer Approved Model 3	1 Download Model
	TS5A22364QDGSRQ1 Texas Instruments	1	Automotive 0.65-Ω Dual SPDT Analog Switch With Negative Signaling Capability	Small Outline Packages	TS5A22364QDGSRQ1	3D model available Symbol and footprint available 3	1 Download Model
	TS5A22364YZPR Texas Instruments	1	0.65-Ω Dual SPDT Analog Switch With Negative Rail Capability	BGA	TS5A22364YZPR	3D model available Symbol and footprint available 3	1 Download Model
	LTC2364CMS-16#PBF Analog Devices	1	Analog to Digital Converters - ADC 16-Bit, 250ksps, Pseudo-Differential Unipolar SAR ADC with 94.7dB SNR	Small Outline Packages	LTC2364CMS-16#PBF	3D model available Symbol and footprint available 3	1 Download Model
	OPA2364AID Texas Instruments	1	1.8V, High CMR, RRIO Op Amp	Small Outline Packages	OPA2364AID	3D model available Symbol and footprint available 3	1 Download Model
	MAL217236471E3 Vishay	1	Aluminum Electrolytic Capacitors Radial Miniature, Low Impedance, Automotive Grade	Capacitor, Polarized Radial Diameter	MAL217236471E3	3D model available Symbol and footprint available 3	1 Download Model
	6-2364427-6 TE Connectivity	1	Board-to-Board, 64 Position, 1 mm [.04 in] Centerline, Vertical, Black, Height 11.25 mm [.44 in], Width 8.2 mm [.32 in], PCI & PCI Express Connectors	Other	6-2364427-6	3D model not available Symbol and footprint available 2	1 Download Model

	2364427-2 TE Connectivity	1	Board-to-Board, 64 Position, 1 mm [.04 in] Centerline, Vertical, Black, 11.25 mm [.44 in] Height, 8.2 mm [.32 in] Width, PCI & PCI Express Connectors	Other	2364427-2	3D model available Symbol and footprint available 3	1 Download Model
	1827236-4 TE Connectivity	1	Body Features: Latch Plating Material Tin \| Connector Profile Low \| Ejector Type Locking \| Module Key Type SGRAM \| Ejector Location Both Ends \| Latch Material Stainless Steel \| Configuration Features: Number of Positions 200 \| Module Orientation Right Angle \| Number of Bays 2 \| Number of Rows 2 \| Number of Keys 1 \| Contact Features: Contact Current Rating (Max) .5 AMP \| PCB Contact Termination Area Plating Material Gold Flash \| Contact Mating Area Plating Material Gold Flash \| Contact Base Material Copper A	Other	1827236-4	3D model available Symbol and footprint available 3	1 Download Model
	723643L12PF Renesas Electronics	1	The 723643 is a 1K x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723643L12PF	3D model available Symbol and footprint available 3	1 Download Model
	M62364FP#DF1G Renesas Electronics	1	Renesas Electronics M62364FP#DF1G, Peripheral Driver Octal, 2.7 → 5.5 V, 24-Pin, SOP	Small Outline Packages	M62364FP#DF1G	3D model available Symbol and footprint available 3	1 Download Model
	LTC2364IMS-18#PBF Analog Devices	1	Analog to Digital Converters - ADC 18-Bit, 250ksps, Pseudo-Differential Unipolar SAR ADC with 97dB SNR	Small Outline Packages	LTC2364IMS-18#PBF	3D model available Symbol and footprint available 3	1 Download Model
	M20-7823646 RS Pro	0	36 way top entry socket,2.54mm pitch RS Pro 2.54mm Pitch 36 Way 1 Row Straight PCB Socket, Through Hole, Solder Termination	Header, Receptacle - Straight PTH Box	M20-7823646	3D model not available Symbol and footprint available 2	1 Download Model
	RR121-2A32-364 Coto Technology	1	COTO TECHNOLOGY - RR121-2A32-364 - TMR SENSOR, UNIPOLAR SW, 3.6V, LGA	Other	RR121-2A32-364	3D model available Symbol and footprint available 3	1 Download Model
	723642L15PF Renesas Electronics	1	The 723642 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723642L15PF	3D model available Symbol and footprint available 3	1 Download Model
	723646L12PF Renesas Electronics	1	The 723646 is a 1K x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. Communication between each port may bypass the FIFOs via two mailbox registers. These devices can operate in the IDT Standard mode or First Wo	Quad Flat Packages	723646L12PF	3D model available Symbol and footprint available 3	1 Download Model
	832-3646 Wago	1	THT male header; 1.2 x 1.2 mm solder pin; angled; 100% protected against mismating; Silver-plated contacts; Pin spacing 10.16 mm; 6-pole	Other	832-3646	3D model available Symbol and footprint available Manufacturer Approved Model 3	1 Download Model
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