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Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 Pressure Sensor, Accelerometer and Temperature Sensor Automotive 24-Pin QFN EP T/R Quad Flat No-Lead FXTH870911DT1 1 Download Model
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TPS70912QDRVRQ1 Texas Instruments
1 Automotive 150-mA 30-V ultra-low-IQ wide-input LDO regulator with reverse-current protection Small Outline No-lead TPS70912QDRVRQ1 1 Download Model
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TPS70918DRVRM3 Texas Instruments
1 LDO Voltage Regulators 150-mA, 30-V, ultra-low-IQ, low-dropout voltage regulator with reverse current protection and enable Small Outline No-lead TPS70918DRVRM3 1 Download Model
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AD7091R-5BRUZ Analog Devices
1 ANALOG DEVICES - AD7091R-5BRUZ - Analogue to Digital Converter, Ultralow Power, 12 bit, 22.22 kSPS, Single Ended, I2C, Single, 2.7 V Small Outline Packages AD7091R-5BRUZ 1 Download Model
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TPS70918DRVT Texas Instruments
1 150-mA 30-V ultra-low-Iq wide-input low-dropout (LDO) regulator with reverse current protection Small Outline No-lead TPS70918DRVT 1 Download Model
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TPS70919DBVR Texas Instruments
1 150-mA 30-V ultra-low-Iq wide-input low-dropout (LDO) regulator with reverse current protection SOT23 (5-Pin) TPS70919DBVR 1 Download Model
Part Image Part Image 1 Power Switch ICs - Power Distribution Automotive High side 100mohm IPS 75V Small Outline Packages AUIPS7091GTR 1 Download Model
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TPS709135DBVT Texas Instruments
1 150-mA 30-V ultra-low-Iq wide-input low-dropout (LDO) regulator with reverse current protection SOT23 (5-Pin) TPS709135DBVT 1 Download Model
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709155001610004. Kyocera AVX
1 1 Position Spring Battery Contact Connector Surface Mount Other 709155001610004. 1 Download Model
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870919BRI-01LFT Renesas Electronics
1 The 870919I-01 is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also Small Outline Packages 870919BRI-01LFT 1 Download Model
Part Image Part Image 1 1.25mm Pitch, PicoBlade PCB Header, Single Row, Vertical, Through Hole, Tin Plating, Friction Lock, 9 Circuits, Tray, 2.30mm PC Tail Length Other 530470910 1 Download Model
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870919BRI-01LF Renesas Electronics
1 The 870919I-01 is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also Small Outline Packages 870919BRI-01LF 1 Download Model
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1717091 Phoenix Contact
1 PCB terminal block, nominal current: 17.5 A, rated voltage (III/2): 400 V, nominal cross section: 1.5 mm?, Number of potentials: 2, Number of rows: 1, Number of positions per row: 2, product range: MKDSFW 1,5, pitch: 5 mm, connection method: Screw connection with tension sleeve, mounting: Wave soldering, conductor/PCB connection direction: 90 ?, color: green, Pin layout: Linear pinning, Solder pin [P]: 5 mm, type of packaging: packed in cardboard. The article can be aligned to create different nos. of posit Other 1717091 1 Download Model
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70914S15PF8 Renesas Electronics
1 The 70914 is a high-speed 4K x 9 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts. The 70914 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode. Quad Flat Packages 70914S15PF8 1 Download Model
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709159L7PF8 Renesas Electronics
1 The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent Quad Flat Packages 709159L7PF8 1 Download Model
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870919BRILFT Renesas Electronics
1 The 870919I is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also be Small Outline Packages 870919BRILFT 1 Download Model
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709159L9BF Renesas Electronics
1 The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent BGA 709159L9BF 1 Download Model
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AD7091R-2BCPZ-RL7 Analog Devices
1 2-Channel, 1 MSPS, Ultralow Power, 12-Bit ADC in 16-Lead TSSOP Quad Flat No-Lead AD7091R-2BCPZ-RL7 1 Download Model
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AD7091R-8BRUZ Analog Devices
1 8-Channel, 1 MSPS, Ultralow Power, 12-Bit ADC in 24-Lead TSSOP Small Outline Packages AD7091R-8BRUZ 1 Download Model
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870919BVI-01LF Renesas Electronics
1 The 870919I-01 is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also Plastic Leaded Chip Carrier 870919BVI-01LF 1 Download Model
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709159L6PF Renesas Electronics
1 The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent Quad Flat Packages 709159L6PF 1 Download Model
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AD7091R-8BCPZ-RL7 Analog Devices
1 Analog to Digital Converters - ADC 8 chn 12 bit SAR ADC, ref(max), SPI Quad Flat No-Lead AD7091R-8BCPZ-RL7 1 Download Model
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AD7091R-2BRUZ-RL7 Analog Devices
1 12 Bit Analog to Digital Converter 2 Input 1 SAR 16-TSSOP Small Outline Packages AD7091R-2BRUZ-RL7 1 Download Model
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709159L7BFI Renesas Electronics
1 The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent BGA 709159L7BFI 1 Download Model
Part Image Part Image 1 Surge Arresters, 2 electrodes Arresters, Nominal DC sparkover voltage = 470V Other B88069X7091S102 1 Download Model
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