HC08 Model Download Search Results

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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 AND Gate 4-Element 2-IN CMOS 14-Pin SOIC T/R Small Outline Packages 74HC08D(BJ) 1 Download Model
Part Image Part Image 1 Fanout of 10 LS-TTL loads; Quiescent power consumption: 2 µA maximum at room temperature; Typical propagation delay: 7 ns (tPHL), 12 ns (tPLH); Low input current: 1 µA maximum Small Outline Packages MM74HC08M 1 Download Model
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74HC08S14-13 Diodes Incorporated
1 74HC Quad 2-input AND Gate SO14 Small Outline Packages 74HC08S14-13 1 Download Model
Part Image Part Image 1 Logic Gates QUAD 2-INPUT AND GATE Small Outline Packages 74HC08DB,118 1 Download Model
Part Image Part Image 1 74AHC(T)08 - Quad 2-input AND gate@en-us Small Outline Packages 74AHC08D,112 1 Download Model
Part Image Part Image 1 74VHC(T)08 - Quad 2-input AND gate@en-us Small Outline Packages 74VHC08PW,118 1 Download Model
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AF54RHC08ANT-R Apogee Semiconductor
1 Quad 2-input Small Outline Packages AF54RHC08ANT-R 1 Download Model
Part Image Part Image 1 74HC(T)08 - Quad 2-input AND gate@en-us Other 74HC08BQ,115 1 Download Model
Part Image Part Image 1 Pin and function compatible with 74HC08; Low power dissipation: ICC = 2 µA (Max) @ TA = 25°C; Power down protection is provided on all inputs; Low noise: VOLP = 0.8V (max); High noise immunity: VNIH = VNIL = 28% VCC (min); High Speed: tPD = 4.3 ns (typ) at TA = 25°C Small Outline Packages 74VHC08MTCX 1 Download Model
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TC74HC08AF Toshiba
1 Quad 2-Input/AND, SOP14 Small Outline Packages TC74HC08AF 1 Download Model
Part Image Part Image 1 Chip Complexity: 24 FETs or 6 Equivalent Gates; High Noise Immunity Characteristic of CMOS Devices; Low Input Current: 1mA; Outputs Directly Interface to CMOS, NMOS and TTL; Output Drive Capability: 10 LSTTL Loads; Operating Voltage Range: 2 to 6V; In Compliance With the JEDEC Standard No. 7A Requirements; Pb-Free Packages are Available* Small Outline Packages MC74HC08ADTR2G-Q 1 Download Model
Part Image Part Image 1 Latchup Performance Exceeds 300mA; High Speed: tPD = 4.3 ns (Typ) at VCC = 5V; High Noise Immunity: VNIH = VNIL = 28% VCC; Balanced Propagation Delays; Chip Complexity: 24 FETs or 6 Equivalent Gates; Low Noise: VOLP = 0.8V (Max); ESD Performance: HBM > 2000V; Machine Model > 200V; Pin and Function Compatible with Other Standard Logic Families; Designed for 2V to 5.5V Operating Range; Low Power Dissipation: ICC = 2 ?A (Max) at TA = 25 C; Power Down Protection Provided on Inputs; Pb-Free Packages are Availabl Small Outline Packages MC74VHC08DTR2G-Q 1 Download Model
Part Image Part Image 1 74AHC(T)08-Q100 - Quad 2-input AND gate@en-us Other 74AHC08BQ-Q100X 1 Download Model
Part Image Part Image 1 74VHC(T)08-Q100 - Quad 2-input AND gate@en-us Small Outline Packages 74VHC08PW-Q100J 1 Download Model
Part Image Part Image 1 74HC(T)08 - Quad 2-input AND gate@en-us Small Outline Packages 74HC08DB,112 1 Download Model
Part Image Part Image 1 Fanout of 10 LS-TTL loads; Quiescent power consumption: 2 µA maximum at room temperature; Typical propagation delay: 7 ns (tPHL), 12 ns (tPLH); Low input current: 1 µA maximum Small Outline Packages MM74HC08MTCX 1 Download Model
Part Image Part Image 1 74HC(T)08-Q100 - Quad 2-input AND gate@en-us Small Outline Packages 74HC08D-Q100,118 1 Download Model
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74VHC08M onsemi
1 Pin and function compatible with 74HC08; Low power dissipation: ICC = 2 µA (Max) @ TA = 25°C; Power down protection is provided on all inputs; Low noise: VOLP = 0.8V (max); High noise immunity: VNIH = VNIL = 28% VCC (min); High Speed: tPD = 4.3 ns (typ) at TA = 25°C Other 74VHC08M 1 Download Model
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AF54RHC08ENT-R Apogee Semiconductor
1 Quad 2-input Small Outline Packages AF54RHC08ENT-R 1 Download Model
Part Image Part Image 1 Latchup Performance Exceeds 300mA; High Speed: tPD = 4.3 ns (Typ) at VCC = 5V; High Noise Immunity: VNIH = VNIL = 28% VCC; Balanced Propagation Delays; Chip Complexity: 24 FETs or 6 Equivalent Gates; Low Noise: VOLP = 0.8V (Max); ESD Performance: HBM > 2000V; Machine Model > 200V; Pin and Function Compatible with Other Standard Logic Families; Designed for 2V to 5.5V Operating Range; Low Power Dissipation: ICC = 2 ?A (Max) at TA = 25 C; Power Down Protection Provided on Inputs; Pb-Free Packages are Availabl Small Outline Packages MC74VHC08DTRG-Q 1 Download Model
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TC74HC08AP Toshiba
1 Quad 2-Input/AND, DIP14 Dual-In-Line Packages TC74HC08AP 1 Download Model
Part Image Part Image 1 74VHC(T)08-Q100 - Quad 2-input AND gate@en-us Other 74VHC08D-Q100J 1 Download Model
Part Image Part Image 1 74AHC(T)08-Q100 - Quad 2-input AND gate@en-us Small Outline Packages 74AHC08PW-Q100J 1 Download Model
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74HC08T14-13 Diodes Incorporated
1 74HC Quad 2-input AND Gate TSSOP14 Small Outline Packages 74HC08T14-13 1 Download Model
Part Image Part Image 1 74HC(T)08-Q100 - Quad 2-input AND gate@en-us Other 74HC08BQ-Q100,115 1 Download Model
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