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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	74FCT162H244CTPVC Texas Instruments	1	TEXAS INSTRUMENTS - 74FCT162H244CTPVC - LOGIC, BUFF/DVR 16BIT N-INV, 48SSOP	Small Outline Packages	74FCT162H244CTPVC	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162373ATPVCT Texas Instruments	1	Latches 16B Transp D-Type	Small Outline Packages	74FCT162373ATPVCT	3D model available Symbol and footprint available 3	1 Download Model
	74FCT2373CTSOCTG4 Texas Instruments	1	Latches Octal D-Type Transp	Small Outline Packages	74FCT2373CTSOCTG4	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162H245CTPVCT Texas Instruments	1	Bus Transceivers 16B Bus Transceivers	Small Outline Packages	74FCT162H245CTPVCT	3D model available Symbol and footprint available 3	1 Download Model

	74FCT573CTQG Renesas Electronics	1	The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).	Small Outline Packages	74FCT573CTQG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SOGI Renesas Electronics	1	The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807SOGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162827CTPAG Renesas Electronics	1	The 74FCT162827T 20-bit buffers provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. The device can operate as two 10-bit buffers or one 20-bit buffer. The 74FCT162827T has low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. The 74FCT162827T operates at -40C to +85C	Small Outline Packages	74FCT162827CTPAG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT16952ATPAG Renesas Electronics	1	The 74FCT16952T 16-bit high-speed, low-power registered transceiver is organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. The output buffers are designed with power off disable capability allowing "live insertion" of boards when used as backplane drivers. The 74FCT16952T operates at -40C to +85C	Small Outline Packages	74FCT16952ATPAG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38074DCGI8 Renesas Electronics	1	The FCT38074 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:4 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT38074DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38075SCMGI8 Renesas Electronics	1	The 74FCT38075S is a low skew, single input to five output, LVCMOS clock buffer. The 74FCT38075S has best in class additive phase Jitter of sub 50 fsec.	Small Outline No-lead	74FCT38075SCMGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807DPYGI Renesas Electronics	1	The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807DPYGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162245ATPAG Renesas Electronics	1	The 74FCT162245T 16-bit high-speed, low-power transceiver is ideal for synchronous communication between two buses and can operate as either two independent 8-bit transceivers or one 16-bit transceiver. The 74FCT162245T offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. It is a plug-in replacement for the 74FCT16245T for on-board interface applications. The 74FCT162245T operates at -40C to +85C. (For Mil version, see 5	Small Outline Packages	74FCT162245ATPAG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT377CTSOG Renesas Electronics	1	The 74FCT377T is an octal D flip-flop that has eight edge-triggered, D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is low. The register is fully edge-triggered. The 74FCT377T operates at -40C to +85C	Small Outline Packages	74FCT377CTSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT244ATQG8 Renesas Electronics	1	The 74FC244T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT244T operates at -40C to +85C. (For Mil version, see 54FCT244T)	Small Outline Packages	74FCT244ATQG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT163244CPVG8 Renesas Electronics	1	The 74FCT163244 16-bit high-speed, low-power buffer/line drivers offer bus/ backplane interface capability with improved packing density. The three-state controls operate these devices in a Quad-Nibble, Dual-Byte or single 16-bit word mode. The inputs can be driven from either 3.3V or 5V devices allowing the use of these devices as translators in a mixed 3.3V/5V supply system. Thus, the 74FCT163244 can be used as buffers to connect 5V components to a 3.3V bus. The 74FCT163244 operates at -40C to +85C	Small Outline Packages	74FCT163244CPVG8	3D model available Symbol and footprint available 3	1 Download Model

	74FCT3245PGG8 Renesas Electronics	1	The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C	Small Outline Packages	74FCT3245PGG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162373CTPVG Renesas Electronics	1	The 74FCT162373T 16-bit high-speed, low-power transparent D-type latch is ideal for temporary storage of data. It can be used for implementing memory address latches, I/O ports, and bus drivers and can operate as two 8-bit latches, or one 16-bit latch. The 74FCT162373T offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. It is a plug-in replacement for the 74FCT16373T for on-board interface applications. The 74FCT162373T	Small Outline Packages	74FCT162373CTPVG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT388915TDPYG Renesas Electronics	1	The FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max. The FCT388915T provides 8 out	Small Outline Packages	74FCT388915TDPYG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3244PYG8 Renesas Electronics	1	The 74FCT3244 octal high-speed, low-power buffer/line driver is designed to be used as memory data and address drivers, clock drivers, and bus-oriented transmitter/receivers. The three-state controls are designed to operate these devices in a dual-nibble or single-byte mode. The 74FCT3244 operates at -40C to +85C	Small Outline Packages	74FCT3244PYG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT244CTPGG8 Renesas Electronics	1	The 74FC244T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT244T operates at -40C to +85C. (For Mil version, see 54FCT244T)	Small Outline Packages	74FCT244CTPGG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT240ATPYG Renesas Electronics	1	The 74FCT240T octal buffer/line driver is designed to be employed as a memory and address driver, clock driver, and bus-oriented transmitter/ receiver which provides improved board density. The 74FCT240T operates at -40C to +85C. (For Mil version, see 54FCT240T)	Small Outline Packages	74FCT240ATPYG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SQGI Renesas Electronics	1	The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec.	Small Outline Packages	74FCT3807SQGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT162244ETPVG8 Renesas Electronics	1	The 74FCT162244T 16-Bit high speed, low power Buffer/Line Driver can operate as independent 4-bit, 8-bit or combined 16-bit operation. The 74FCT162244T reduces the need for external series terminating resistors while still providing very high speed operation for loads of less than 200pF. The 74FCT162244T operates at -40C to +85C. (For Mil version, see 54FCT162244T)	Small Outline Packages	74FCT162244ETPVG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT807BTSOG Renesas Electronics	1	The FCT807T clock driver is built using advanced dual metal CMOS technology. This low skew clock driver features 1:10 fanout, providing minimal loading on the preceding drivers. The FCT807T offers low capacitance inputs with hysteresis for improved noise margins. TTL level outputs and multiple power and grounds reduce noise. The device also features -32/48mA drive capability for driving low impedance traces.	Small Outline Packages	74FCT807BTSOG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT16373CTPAG Renesas Electronics	1	The 74FCT16373T 16-bit high-speed, low-power transparent D-type latch is ideal for temporary storage of data and can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches, or one 16-bit latch. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The 74FCT16373T operates at -40C to +85C	Small Outline Packages	74FCT16373CTPAG	3D model available Symbol and footprint available 3	1 Download Model
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