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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	74AHC1G4214GW-Q10H Nexperia	1	vp_74AHC1G4214_Q100.ditamap - 14-stage divider and oscillator@en-us	SOT23 (5-Pin)	74AHC1G4214GW-Q10H	3D model available Symbol and footprint available 3	1 Download Model
	MAX6817MUT/PR3+T Analog Devices	1	PACKAGE: SOT23-6	SOT23 (6-Pin)	MAX6817MUT/PR3+T	3D model available Symbol and footprint available 3	1 Download Model
	TPIC6259DWRG4 Texas Instruments	1	Latch Addressable Open Drain 8-CH D-Type Automotive 20-Pin SOIC T/R	Small Outline Packages	TPIC6259DWRG4	3D model available Symbol and footprint available 3	1 Download Model
	CD74HC297E Texas Instruments	1	High Speed CMOS Logic Digital Phase-Locked-Loop	Dual-In-Line Packages	CD74HC297E	3D model available Symbol and footprint available 3	1 Download Model

	NB7L86MMNG onsemi	1	ON SEMICONDUCTOR - NB7L86MMNG - LOGIC GATE, MULTI-FUNCTION, QFN-16	Quad Flat No-Lead	NB7L86MMNG	3D model available Symbol and footprint available 3	1 Download Model
	SN74AUP1G99YZPR Texas Instruments	1	Configurable Multiple Function Configurable 1 Circuit 3 Input 8-DSBGA	BGA	SN74AUP1G99YZPR	3D model available Symbol and footprint available 3	1 Download Model
	SN74LS628D Texas Instruments	1	Oscillator VCO 1.1MHz to 25MHz 45pF Squarewave 50% 5V 14-Pin SOIC SMD Tube	Small Outline Packages	SN74LS628D	3D model available Symbol and footprint available 3	1 Download Model
	SN74AUP1G57DRLR Texas Instruments	1	Low-Power Configurable Multiple-Function Gate	SO Transistor Flat Lead	SN74AUP1G57DRLR	3D model available Symbol and footprint available 3	1 Download Model
	SN74TVC3010DBQR Texas Instruments	1	10-Bit Voltage Clamp	Small Outline Packages	SN74TVC3010DBQR	3D model available Symbol and footprint available 3	1 Download Model
	SN74LVC1G97DSFR Texas Instruments	1	Configurable Multiple-Function Gate	Small Outline No-lead	SN74LVC1G97DSFR	3D model available Symbol and footprint available 3	1 Download Model
	SN74AUP1G99DCUR Texas Instruments	1	Low-Power Ultra-Configurable Multiple-Function Gate with 3-State Outputs	Small Outline Packages	SN74AUP1G99DCUR	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G97GF,132 Nexperia	1	74LVC1G97 - Low-power configurable multiple function gate@en-us	Other	74LVC1G97GF,132	3D model available Symbol and footprint available 3	1 Download Model
	HMC988LP3ETR Analog Devices	1	Programmable Clock Divider & Delay, DC - 4 GHz	Quad Flat No-Lead	HMC988LP3ETR	3D model available Symbol and footprint available 3	1 Download Model
	NB7L86AMNG onsemi	1	Maximum Input Clock Frequency > 8 GHz Typical; Maximum Data Input Rate > 8 Gb/s Typical; 165 ps Typical Propagation Delay; 40 ps Typical Rise and Fall Times; Selectable Swing PECL Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V; Selectable Swing NECL Output with NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V; 50Ω Internal Input Termination Resistors; Selectable Output Level Select (0 V, 200 mV, 400 mV, 600 mV, or 800 mV Peak-to-Peak Output)	Quad Flat No-Lead	NB7L86AMNG	3D model available Symbol and footprint available 3	1 Download Model
	74AUP1G98GW,125 Nexperia	1	74AUP1G98 - Low-power configurable multiple function gate@en-us	SOT23 (6-Pin)	74AUP1G98GW,125	3D model available Symbol and footprint available 3	1 Download Model

	MC14490DWG onsemi	1	Schmitt Trigger on Clock Input (Pin 7); Single Line Input, Debounces Both "Make" and "Break" Contacts; Chip Complexity: 546 FETs or 136.5 Equivalent Gates; Cascadable for Longer Time Delays; Supply Voltage Range = 3.0 V to 18 V; TTL Compatible Data Inputs/Outputs; Does Not Require "Form C" (Single Pole Double Throw) Input Signal; Internal Oscillator (R-C), or External Clock Source; Diode Protection on All Inputs; Can Be Used as a Digital Integrator, System Synchronizer, or Delay Line; Six Debouncers Per Pac	Small Outline Packages	MC14490DWG	3D model available Symbol and footprint available 3	1 Download Model
	674R-01ILF Renesas Electronics	1	The 674-01 consists of two separate configurable dividers. The A Divider is a 7-bit divider and can divide by 3 to 129. The B Divider consists of a 9-bit divider followed by a post divider. The 9-bit divider can divide by 12 to 519. The post divider has eight settings of 1, 2, 4, 5, 6, 7, 8, and 10; giving a maximum total divide of 5190. The A and B Dividers can be cascaded to give a maximum divide of 669510. The 674-01 supports the 673 PLL Building Block and enables the user to build a full custom PLL synt	Small Outline Packages	674R-01ILF	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G97W6-7 Diodes Incorporated	1	Configurable Multiple Function Configurable 1 Circuit 3 Input SOT-26	SOT23 (6-Pin)	74LVC1G97W6-7	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G57GM,115 Nexperia	1	74LVC1G57 - Low-power configurable multiple function gate@en-us	Other	74LVC1G57GM,115	3D model available Symbol and footprint available 3	1 Download Model
	74AHC1G4210GW-Q10H Nexperia	1	74AHC1G4210-Q100 - 10-stage divider and oscillator@en-us	SOT23 (5-Pin)	74AHC1G4210GW-Q10H	3D model available Symbol and footprint available 3	1 Download Model
	MAX6816EUS+T Analog Devices	1	Maxim MAX6816EUS+T, Bounce Eliminator Circuit, 2.7 V to 5.5 V, 4-Pin SOT-143	Other	MAX6816EUS+T	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G97GW,125 Nexperia	1	Low-power configurable multiple function gate	Other	74LVC1G97GW,125	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G97GS,132 Nexperia	1	74LVC1G97 - Low-power configurable multiple function gate@en-us	Other	74LVC1G97GS,132	3D model available Symbol and footprint available 3	1 Download Model
	74LVC1G57DW-7 Diodes Incorporated	1	DiodesZetex 74LVC1G57DW-7, 2-Input Multifunction Logic Gate, 1.65 → 5.5 V, 6-Pin SOT-363	SOT23 (6-Pin)	74LVC1G57DW-7	3D model available Symbol and footprint available 3	1 Download Model
	74AUP1G97GW,125 Nexperia	1	74AUP1G97 - Low-power configurable multiple function gate@en-us	Other	74AUP1G97GW,125	3D model available Symbol and footprint available 3	1 Download Model
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