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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	IS63LV1024L-10TLI Integrated Silicon Solution Inc.	1	SRAM Chip Async Single 3.3V 1M-Bit 128K x 8 10ns 32-Pin TSOP-II	Small Outline Packages	IS63LV1024L-10TLI	3D model available Symbol and footprint available 3	1 Download Model
	M68AF127BL70MC1U STMicroelectronics	1	RAM Miscellaneous 1M (128Kx8) 70ns	Small Outline Packages	M68AF127BL70MC1U	3D model available Symbol and footprint available 3	1 Download Model
	IDT7133LA25JGI Renesas Electronics	1	IDT IDT7133LA25JGI SRAM Memory, 32kbit, 4.5 → 5.5 V, 25ns 68-Pin PLCC	Plastic Leaded Chip Carrier	IDT7133LA25JGI	3D model available Symbol and footprint available 3	1 Download Model
	M48T37Y-70MH1E STMicroelectronics	1	M48T37Y-70MH1E, Real Time Clock, Alarm, Calendar, Clock, Watchdog Timer, 32768B RAM, Parallel, 4.5 , 5.5 V	Small Outline Packages	M48T37Y-70MH1E	3D model available Symbol and footprint available 3	1 Download Model

	AS6C3216A-55TIN Alliance Memory	1	SRAM 32M, 3V, 55ns 2048K x 16 Asyn SRAM	Small Outline Packages	AS6C3216A-55TIN	3D model available Symbol and footprint available 3	1 Download Model
	IDT7130LA20JG Renesas Electronics	1	IDT IDT7130LA20JG SRAM Memory, 8kbit, 4.5 → 5.5 V, 20ns 52-Pin PLCC	Plastic Leaded Chip Carrier	IDT7130LA20JG	3D model available Symbol and footprint available 3	1 Download Model
	CY62147EV30LL-45B2XI Infineon	1	Cypress Semiconductor, CY62147EV30LL-45B2XI SRAM Memory, 4Mbit, 45ns, 2.2 → 3.6 V 48-Pin FBGA	BGA	CY62147EV30LL-45B2XI	3D model available Symbol and footprint available 3	1 Download Model
	71V30S55TFG Renesas Electronics	1	The 71V30 high-speed 1K x 8 Dual-Port Static RAM is designed to be used as a stand-alone 8-bit Dual-Port SRAM. It has two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	71V30S55TFG	3D model available Symbol and footprint available 3	1 Download Model
	7143SA35G Renesas Electronics	1	The 7143 is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7143SA35G	3D model available Symbol and footprint available 3	1 Download Model
	71T75902S85BG Renesas Electronics	1	The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround.	BGA	71T75902S85BG	3D model available Symbol and footprint available 3	1 Download Model
	70V658S12BCI Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V658S12BCI	3D model available Symbol and footprint available 3	1 Download Model
	71V2556S100PFGI Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V2556S100PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V67703S80BQGI Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V67703S80BQGI	3D model available Symbol and footprint available 3	1 Download Model
	7133SA70G Renesas Electronics	1	The 7133 high-speed 2K x 16 Dual-Port Static RAMs is designed to be used as a stand-alone 16-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7143 "SLAVE" Dual-Port in 32-bit-or-more word width systems. Low-power (LA) versions offer battery backup data retention capability, with each port typically consuming 200μW for a 2V battery. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7133SA70G	3D model available Symbol and footprint available 3	1 Download Model
	70T659S15BF8 Renesas Electronics	1	The 70T659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T659S15BF8	3D model available Symbol and footprint available 3	1 Download Model

	71V3577S80BQ8 Renesas Electronics	1	The 71V3577 3.3V CMOS SRAM is organized as 128K x 36. The 71V3577 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V3577S80BQ8	3D model available Symbol and footprint available 3	1 Download Model
	7006L20PFGI8 Renesas Electronics	1	The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Quad Flat Packages	7006L20PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65603S150BGG8 Renesas Electronics	1	The 71V65603 3.3V CMOS SRAM is organized as 256K X 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65603 contain data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65603S150BGG8	3D model available Symbol and footprint available 3	1 Download Model
	70T651S10BFI8 Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S10BFI8	3D model available Symbol and footprint available 3	1 Download Model
	71V3557S85BGI Renesas Electronics	1	The 71V3557 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3557 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	BGA	71V3557S85BGI	3D model available Symbol and footprint available 3	1 Download Model
	71V67603S166PFG Renesas Electronics	1	The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin.	Quad Flat Packages	71V67603S166PFG	3D model available Symbol and footprint available 3	1 Download Model
	70V7339S133BFI8 Renesas Electronics	1	The 70V7339 is a high-speed 512K x 18 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 8K x 18 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 8K x 18 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7339S133BFI8	3D model available Symbol and footprint available 3	1 Download Model
	71256L35YG Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Other	71256L35YG	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S85BQGI Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65703S85BQGI	3D model not available Symbol and footprint available 2	1 Download Model
	5962-8687515XA Renesas Electronics	1	The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with	Ceramic Dual-In-Line Packages	5962-8687515XA	3D model not available Symbol and footprint available 2	1 Download Model
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