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MK1491-06RLF
Renesas Electronics
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1 | The MK1491-06 is a low-cost, low-jitter, high-performance clock synthesizer for AMD's Geode-based computer and portable appliance applications. Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks. It provides selectable PCI local bus and AC97 clocks, 24 MHz and 48 MHz clocks for Super I/O and USB, as well as multiple Reference outputs. The device has a power down mode to reduce power consumption. | Small Outline Packages | MK1491-06RLF |
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667M-01LFT
Renesas Electronics
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1 | The 667-01 is a low-cost, low jitter, high-performance PLL clock synthesizer designed to produce the 74.176 MHz clock necessary for HDTV systems. Using IDT's patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock input. The zero ppm synthesis error exactly locks the display to the digital stream. IDT manufactures the largest variety multimedia clock synthesizers for all applications. Consult IDT to eliminate crystals and oscillators from your board. | Small Outline Packages | 667M-01LFT |
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5L2503-000NVGI
Renesas Electronics
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1 | The 5L2503 MicroClock is a programmable clock generator, and is intended for low power, consumer, wearable and smart devices. The 5L2503 device is a 3 PLL architecture design. Each PLL is individually programmable, allowing for up to 3 unique frequency outputs. The 5L2503 has built-in unique features such as Proactive Power Saving (PPS) to deliver better system level power management.An internal OTP memory allows the user to store the configuration in the device without programming after power-up, and then | Small Outline No-lead | 5L2503-000NVGI |
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5V49EE501NLGI8
Renesas Electronics
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1 | The 5V49EE501 is a programmable clock generator intended for high performance data-communications, telecommunications, consumer, and networking applications. There are four internal PLLs, each individually programmable, allowing for four unique non-integer-related frequencies. The frequencies are generated from a single reference clock. The reference clock can come from one of the two redundant clock inputs. Automatic or manual switchover function allows any one of the redundant clocks to be selected during | Quad Flat No-Lead | 5V49EE501NLGI8 |
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7152AMI-02LFT
Renesas Electronics
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1 | The 7152A-02 is a clock generator for EMI (Electromagnetic Interference) reduction (see datasheet for frequency ranges and multiplier ratios). Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to | Small Outline Packages | 7152AMI-02LFT |
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9FGV1008C000LTGI8
Renesas Electronics
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1 | Programmable PhiClock™ Generator | Other | 9FGV1008C000LTGI8 |
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270PGILF
Renesas Electronics
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1 | The 270 field programmable VCXO clock synthesizer generates up to eight high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals and crystal oscillators in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 270 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include VCXO, eight selectable configuration registers and up to two sets | Small Outline Packages | 270PGILF |
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NB3N51034DTR2G
onsemi
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1 | Uses 25 MHz Fundamental Mode Parallel Resonant Crystal; Power Down Mode; 4 Low Skew HCSL or LVDS Outputs; OE Tri-States Outputs; Spread of -0.5%, -1.0%, -1.5% and No Spread; PCIe Gen 1, Gen 2, Gen 3 and Gen 4 Jitter Compliant; Low Phase Noise; Operating Range 3.3 V ±5%; Industrial Temperature Range-40°C to +85°C; Functionally Compatible with IDT557-05, IDT5V41066, IDT5V41236; These are Pb-Free Devices | Small Outline Packages | NB3N51034DTR2G |
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9FGV0431AKLFT
Renesas Electronics
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1 | The 9FGV0431 is a 4-output very low power clock generator for PCIe Gen 1–4 applications. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off. | Quad Flat No-Lead | 9FGV0431AKLFT |
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841S02CGILF
Renesas Electronics
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1 | The 841S02I is a PLL-based clock generator specifically designed for PCI_Express™ Clock Generation applications. This device generates a 100MHz HCSL clock. The device offers a HCSL Host Clock Signal Level) clock output from a clock input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left floating. The device offers spread spec | Small Outline Packages | 841S02CGILF |
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8V19N490-19BDGI
Renesas Electronics
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1 | The 8V19N490-19 is a fully integrated FemtoClock® NG jitter attenuator and clock synthesizer designed as a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards. The device is optimized to deliver excellent phase noise performance as required in GSM, WCDMA, LTE, and LTE-A radio board implementations. The device supports JESD204B subclass 0 and 1 clocks.A two-stage PLL architecture supports both jitter attenuation and frequency multipl | BGA | 8V19N490-19BDGI |
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5P49V5925B000NLGI8
Renesas Electronics
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1 | The IDT 5P49V5925 is low-power programmable clock generator with best-in-class jitter performance and design flexibility with LVCMOS outputs capable of generating any output frequency. The 5P49V5925 is intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is IDT’s fifth generation of programmable clock technology (VersaClock 5). The freque | Quad Flat No-Lead | 5P49V5925B000NLGI8 |
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844002AGLF
Renesas Electronics
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1 | The 844002 is a 2 output LVDS Synthesizer optimized to generate Fibre Channel reference clock frequencies. Using a 26.5625MHz 18pF parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (F_SEL[1:0]): 212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz and 53.125MHz. The 844002 uses IDT's 3rd generation low phase noise VCO technology and can achieve <1ps typical rms phase jitter, easily meeting Fibre Channel jitter requirements. The 844002 is packaged in a small 20-p | Small Outline Packages | 844002AGLF |
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664G-01LF
Renesas Electronics
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1 | The 664-01 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The 664-01 uses the latest PLL technology to provide excellent phase noise and long term jitter performance for superior synchronization and S/N ratio. For audio sampling clocks generated from 27 MHz, use the 661. Please contact IDT if you have a requirement for an input and output frequency not included in this document. IDT can rapidly modify this product to meet special requirements. | Small Outline Packages | 664G-01LF |
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9FGV1001C011NBGI8
Renesas Electronics
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1 | The 9FGV1001 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1001 provides four non-spread-spectrum copies of a single output frequency and two copies of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits allow easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, | Quad Flat No-Lead | 9FGV1001C011NBGI8 |
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874003AGLF
Renesas Electronics
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1 | The 874003 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express® systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874003 has 3 PLL bandwidth modes: 200kHz, 400kH | Small Outline Packages | 874003AGLF |
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813N252BKI-04LFT
Renesas Electronics
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1 | The 813N252I-04 is a PLL based synchronous multiplier that is optimized for PDH or SONET to Ethernet clock jitter attenuation and frequency translation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a VCXO PLL that is optimized to provide reference clock jitter attenuation. The second stage is a FemtoClock® NG frequency multiplier that provides the low jitter, high frequency Ethernet output clock that easily meets Gigabit and 10 Gigabit Ethe | Quad Flat No-Lead | 813N252BKI-04LFT |
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8413S12BKI-100LFT
Renesas Electronics
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1 | The 8413S12I-100 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high performance device is optimized to generate the processor core reference clock, the PCI-Express reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY. The clock generator offers ultra low-jitter, low-skew clock outputs, and edge rates that easily meet the input requirements for the CN63XX and CN68XX series of processors. The output frequencies are generated from a 25M | Quad Flat No-Lead | 8413S12BKI-100LFT |
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HMC1031MS8ETR
Analog Devices
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1 | Clock Generators & Support Products PLL Crystal mult, Tiny | Small Outline Packages | HMC1031MS8ETR |
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MK1707SILF
Renesas Electronics
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1 | The MK1707 generates a low EMI output clock from a clock input. The part is designed to dither the LCD interface clock for flat panel graphics controllers. The device uses IDT's proprietary mix of analog and digital Phase Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The MK1707 offers both centered and down spread from a high speed clock input. Refer to the MK1714-01/02 for a crystal input and the widest selection o | Small Outline Packages | MK1707SILF |
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9DB202CFLF
Renesas Electronics
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1 | The 9DB202 is a high performance 1-to-2 Differential-to-HCSL Jitter Attenuator designed for use in PCI Express®™ systems. In some PCI Express®™ systems, such as those found in desktop PCs, the PCI Express®™ clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter-attenuating device may be necessary in order to reduce high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 9DB202 has two PLL ban | Small Outline Packages | 9DB202CFLF |
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342MIPLF
Renesas Electronics
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1 | The 342 is a low cost, dual-output, field programmable clock synthesizer. The 342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using ICS' VersaClockTM software to configure the PLL and output, the 342 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 2 selectable configuration registers. | Small Outline Packages | 342MIPLF |
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RC32112A000GN2#BB0
Renesas Electronics
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1 | The RC32112A regenerates and distributes ultra-low jitter clock outputs and features up to 6 independent frequency domains that can be either locked to the external reference clock or locked to a free-run crystal or oscillator. Digital PLLs (DPLLs) support hitless reference switching between references from redundant timing sources. The device supports multiple independent timing channels for: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and radio clock generation including SYSREF g | Quad Flat No-Lead | RC32112A000GN2#BB0 |
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RC38208A100GBB#BC0
Renesas Electronics
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1 | The RC38208 is a high-performance, small form factor, low-power jitter attenuator, multi-frequency clock synthesizer, and digitally controlled oscillator (DCO) designed for critical applications such as 4G/5G RF transceivers and high-speed SerDes. It belongs to Renesas' high-performance FemtoClock™ 3 wireless family. It generates clocks with ultra-low in-band phase noise and spurious signals, achieving jitter below 18fs RMS, making it ideal for 112Gbps and 224Gbps SerDes. The RC38208 can manage up to three | BGA | RC38208A100GBB#BC0 |
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MK1704ALFTR
Renesas Electronics
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1 | The MK1704A is an upgraded version of the MK1704 and is recommended for all new designs. It offers more reduction in the frequency amplitude peaks and will support frequencies up to 140 MHz. The MK1704A generates a low EMI output clock from a clock input. The part is designed to dither the LCD interface clock or other clocks for flat panel graphics controllers. The MK1704A uses IDT's proprietary mixture of analog and digital Phase Locked Loop (PLL) technology to synthesize the frequency. It also uses IDT's | Small Outline Packages | MK1704ALFTR |
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