Flash Memories||Other Memory ICs Footprint, Symbol and 3D Model search results

Showing 25 of 5271 results

Price & Stock Powered by

Filter by Manufacturer

Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71V65903S80BQ Renesas Electronics	1	The 71V65903 3.3V CMOS SRAM is organized as 512K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65903 contain address, data-in and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65903S80BQ	3D model available Symbol and footprint available 3	1 Download Model
	71V124SA12TYGI8 Renesas Electronics	1	The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71V124SA12TYGI8	3D model available Symbol and footprint available 3	1 Download Model
	7025L15JG8 Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Plastic Leaded Chip Carrier	7025L15JG8	3D model not available Symbol and footprint available 2	1 Download Model
	71T75602S133BG8 Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	BGA	71T75602S133BG8	3D model available Symbol and footprint available 3	1 Download Model

	70T653MS12BCGI Renesas Electronics	1	The 70T653M is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone 18874K-bit Dual-Port RAM. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T653MS12BCGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75902S85BGG Renesas Electronics	1	The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround.	BGA	71T75902S85BGG	3D model available Symbol and footprint available 3	1 Download Model
	70V659S12DRGI Renesas Electronics	1	The 70V659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po	Quad Flat Packages	70V659S12DRGI	3D model available Symbol and footprint available 3	1 Download Model
	70T659S12BFI Renesas Electronics	1	The 70T659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T659S12BFI	3D model available Symbol and footprint available 3	1 Download Model
	70V639S12BCI Renesas Electronics	1	The 70V639 is a high-speed 128K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po	BGA	70V639S12BCI	3D model available Symbol and footprint available 3	1 Download Model
	70T3399S166BC Renesas Electronics	1	The 70T3399 is a high-speed 128K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3399 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3399S166BC	3D model available Symbol and footprint available 3	1 Download Model
	70T3589S133BF8 Renesas Electronics	1	The 70T3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3589S133BF8	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA100BGG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA100BGG	3D model available Symbol and footprint available 3	1 Download Model
	70T3319S166BFG Renesas Electronics	1	The 70T3319 is a high-speed 256K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3319 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3319S166BFG	3D model available Symbol and footprint available 3	1 Download Model
	71V2546S133BG8 Renesas Electronics	1	The 71V2546 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2546 has an on-chip burst counter. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2546S133BG8	3D model available Symbol and footprint available 3	1 Download Model
	7052S35G Renesas Electronics	1	The 7052 is a high-speed 2K x 8 FourPort™ Static RAM to be used where multiple access into a common RAM is required. It is designed for systems where on-chip hardware port arbitration is not needed and has four independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low power standby power mode. Milita	Other	7052S35G	3D model available Symbol and footprint available 3	1 Download Model

	71256L45TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	709099L9PFGI Renesas Electronics	1	The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM. Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	709099L9PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S80PFGI Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V65703S80PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7006L17G Renesas Electronics	1	The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7006L17G	3D model available Symbol and footprint available 3	1 Download Model
	7164S45TDB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164S45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	71V3559S85BGI8 Renesas Electronics	1	The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	BGA	71V3559S85BGI8	3D model available Symbol and footprint available 3	1 Download Model
	RMLV0816BGSA-4S2#AA0 Renesas Electronics	1	The RMLV0816BGSA is a family of 8-Mbit static RAMs organized 524, 288-word × 16-bit, fabricated by Renesas’s high-performance Advanced LPSRAM technologies. The RMLV0816BGSA has realized higher density, higher performance and low power consumption. The RMLV0816BGSA offers low power standby power dissipation;therefore, it is suitable for battery backup systems. It is offered in 48pin TSOP (I).	Small Outline Packages	RMLV0816BGSA-4S2#AA0	3D model available Symbol and footprint available 3	1 Download Model
	70T3589S166BF Renesas Electronics	1	The 70T3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3589S166BF	3D model available Symbol and footprint available 3	1 Download Model
	7008L20PFGI Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7008L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V3556S100PFG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3556S100PFG	3D model available Symbol and footprint available 3	1 Download Model
4 5 6 7 8 9 10 11 12

Can't find what you're looking for? Request this part

Flash Memories||Other Memory ICs Model Download Search Results

Popular SRAMs