A15P- Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	A15P-5 XP POWER	1	XP Power A15P-5 DC to High Voltage DC Converter 0 → 5 V dc 660µA 1.5kV dc	Other	A15P-5	3D model available Symbol and footprint available 3	1 Download Model
	DF14A-15P-1.25H(24) Hirose	1	Headers & Wire Housings	Other	DF14A-15P-1.25H(24)	3D model available Symbol and footprint available 3	1 Download Model
	DF3EA-15P-2H(50) Hirose	1	Conn Shrouded Header HDR 15 POS 2mm Solder RA Side Entry SMD Bag	Other	DF3EA-15P-2H(50)	3D model not available Symbol and footprint available 2	1 Download Model
	DA-15P-1-A-0-N-K87 ITT CANNON	1	Conn DSubminiature PIN 15 POS Solder RA ThruHole 15 Terminal 1 Port	Other	DA-15P-1-A-0-N-K87	3D model not available Symbol and footprint available 2	1 Download Model

	DF3A-15P-2DSA Hirose	1	Headers & Wire Housings 2MM V PCB HEADER 15POS THRU-HOLE TIN	Other	DF3A-15P-2DSA	3D model available Symbol and footprint available 3	1 Download Model
	FCE17A15PC410 Amphenol	1	15P Male Right Angle 2 5A -40℃~+85℃ Through Hole,Right Angle D-Sub / VGA Connectors ROHS	Other	FCE17A15PC410	3D model not available Symbol and footprint available 2	1 Download Model
	FCE17A15PA280 Amphenol	1	D-Sub Standard Connectors .318 Right Angle pin;TH brkt brdlock, 5A, -40°C ~ 85°C	Other	FCE17A15PA280	3D model not available Symbol and footprint available 2	1 Download Model
	AS7C164A-15PCN Alliance Memory	1	SRAM SRAM, 64K, 8k x 8, 5v, 28pin Skinny P-DIP, 15ns, Commercial Temp - Tube	Dual-In-Line Packages	AS7C164A-15PCN	3D model available Symbol and footprint available 3	1 Download Model
	DF3A-15P-2DS Hirose	1	Headers & Wire Housings 2MM R/A PCB HEADER 15POS THRU-HOLE TIN	Other	DF3A-15P-2DS	3D model available Symbol and footprint available 3	1 Download Model
	AS7C164A-15PCNTR Alliance Memory	1	SRAM SRAM, 64K, 8k x 8, 5v, 28pin Skinny P-DIP, 15ns, Commercial Temp - Tape & Reel	Other	AS7C164A-15PCNTR	3D model available Symbol and footprint available 3	1 Download Model
	71V124SA15PHGI Renesas Electronics	1	The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Small Outline Packages	71V124SA15PHGI	3D model available Symbol and footprint available 3	1 Download Model
	72V271LA15PFGI Renesas Electronics	1	The 72V271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72271 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle co	Quad Flat Packages	72V271LA15PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71256SA15PZGI8 Renesas Electronics	1	The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71256SA15PZGI8	3D model available Symbol and footprint available 3	1 Download Model
	72V255LA15PFGI8 Renesas Electronics	1	The 72V255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72255 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee	Quad Flat Packages	72V255LA15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72271LA15PF8 Renesas Electronics	1	The 72271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperS	Quad Flat Packages	72271LA15PF8	3D model available Symbol and footprint available 3	1 Download Model

	DF13A-15P-1.25H(51) Hirose	1	Hirose DF13 Series, 1.25mm Pitch 15 Way 1 Row Right Angle PCB Header, Solder Termination, 1A	Other	DF13A-15P-1.25H(51)	3D model available Symbol and footprint available 3	1 Download Model
	72261LA15PFI8 Renesas Electronics	1	The 72261 is a 16K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSyn	Quad Flat Packages	72261LA15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	L717DFA15P1ATN Amphenol Communications Solutions	1	Dsub, Machined signal 7.5A, Right Angle PCB Thru Hole, FP=10.3mm, Cnt Row Spacing 2.54mm, Cnt Tail 0.6mm, 15 Pin, Bright Tin Shell+Grounding Dimples, 0.38m (15 in) Gold, 4-40 Fixed Round Front Screwlock, Metal R/A Bracket Without Boardlock	Other	L717DFA15P1ATN	3D model available Symbol and footprint available 3	1 Download Model
	7201LA15P Renesas Electronics	1	The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Dual-In-Line Packages	7201LA15P	3D model available Symbol and footprint available 3	1 Download Model
	72255LA15PFI8 Renesas Electronics	1	The 72255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data.	Quad Flat Packages	72255LA15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72271LA15PFI8 Renesas Electronics	1	The 72271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperS	Quad Flat Packages	72271LA15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	L717SDA15POL2 Amphenol Communications Solutions	1	Dsub, Stamped Signal 3A, Straight PCB Thru Hole, Back Insulator Plus Back Shell Height 6.0mm, 15 Pin, Flash Gold, Bright Tin Shell+Grounding Dimples, 3.05mm (.120in) Clear Hole, Without Standoff&Boardlock	Other	L717SDA15POL2	3D model available Symbol and footprint available 3	1 Download Model
	72271LA15PF Renesas Electronics	1	The 72271 is a 32K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperS	Quad Flat Packages	72271LA15PF	3D model available Symbol and footprint available 3	1 Download Model
	72261LA15PF8 Renesas Electronics	1	The 72261 is a 16K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSyn	Quad Flat Packages	72261LA15PF8	3D model available Symbol and footprint available 3	1 Download Model
	72V255LA15PFGI Renesas Electronics	1	The 72V255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72255 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee	Quad Flat Packages	72V255LA15PFGI	3D model available Symbol and footprint available 3	1 Download Model
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