G8NB- Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	W634GG8NB12K Winbond	1	DDR3 SDRAM 1600MHz	BGA	W634GG8NB12K	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB12J Winbond	1	DDR3 SDRAM 1600MHz	BGA	W634GG8NB12J	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB15I Winbond	1	2Gb DDR3 SDRAM 1333MHz VFBGA78	BGA	W632GG8NB15I	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB11A Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB11A	3D model available Symbol and footprint available 3	1 Download Model

	W632GG8NB12S Winbond	1	2Gb DDR3 SDRAM 1600MHz VFBGA78	BGA	W632GG8NB12S	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB15J Winbond	1	DDR3 SDRAM 1333MHz	BGA	W634GG8NB15J	3D model available Symbol and footprint available 3	1 Download Model
	W971GG8NB25I Winbond	1	1Gb DDR2 SDRAM 800MHz VFBGA60	BGA	W971GG8NB25I	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB11K Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB11K	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB-3J Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB-3J	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB12K Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8NB12K	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB-3K Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB-3K	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB-11 Winbond	1	4Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W634GG8NB-11	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB25K Winbond	1	512Mb DDR2 SDRAM 800MHz VFBGA60	BGA	W9751G8NB25K	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB12I Winbond	1	4Gb DDR3 SDRAM 1600MHz VFBGA78	BGA	W634GG8NB12I	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB18W Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB18W	3D model available Symbol and footprint available 3	1 Download Model

	W632GG8NB15J Winbond	1	DDR3 SDRAM 1333MHz	BGA	W632GG8NB15J	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB-15 Winbond	1	2Gb DDR3 SDRAM 1333MHz VFBGA78	BGA	W632GG8NB-15	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB09W Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA78	BGA	W632GG8NB09W	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB15K Winbond	1	DDR3 SDRAM 1333MHz	BGA	W634GG8NB15K	3D model available Symbol and footprint available 3	1 Download Model
	W9751G8NB-3W Winbond	1	 Power Supply: VDD, VDDQ = 1.8 V ± 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3, 4, 5, 6 and 7 Burst Length: 4 and 8 Bi-directional, differential data strobes (DQS andDQS) are transmitted / received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK andCLK) Data masks (DM) for write data Commands entered on each positive CLK edge, data	BGA	W9751G8NB-3W	3D model available Symbol and footprint available 3	1 Download Model
	W971GG8NB-25 Winbond	1	1Gb DDR2 SDRAM 800MHz VFBGA60	BGA	W971GG8NB-25	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB15A Winbond	1	2Gb DDR3 SDRAM 1333MHz VFBGA78	BGA	W632GG8NB15A	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB09K Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA78	BGA	W632GG8NB09K	3D model available Symbol and footprint available 3	1 Download Model
	W634GG8NB09I Winbond	1	4Gb DDR3 SDRAM 2133MHz VFBGA78	BGA	W634GG8NB09I	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8NB12J Winbond	1	DDR3 SDRAM 1600MHz	BGA	W632GG8NB12J	3D model available Symbol and footprint available 3	1 Download Model
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