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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	ICS511MILF Renesas Electronics	1	ICS511MILF, PLL Frequency Multiplier, 14 → 160 MHz, 8-Pin SOIC	Small Outline Packages	ICS511MILF	3D model available Symbol and footprint available 3	1 Download Model
	512MILF Renesas Electronics	1	The IDT512 is the most cost effective way to generate a high quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input, and is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. With a reference output, this chip plus an inexpensive crystal can replace two oscillators.	Small Outline Packages	512MILF	3D model available Symbol and footprint available 3	1 Download Model
	651MILF Renesas Electronics	1	The 651 is a low skew, single input to four output, clock buffer. Part of IDT's ClockBlocksTM family, this is a low skew, small clock buffer. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	651MILF	3D model available Symbol and footprint available 3	1 Download Model
	252PMILF Renesas Electronics	1	The IDT252 is a low cost, dual-output, field programmable clock synthesizer. The IDT252 can generate two output frequencies from 314 kHz to 200 MHz using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using IDT's VersaClock™ software to configure the PLL and output, the IDT252 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 4 selectable configuration reg	Small Outline Packages	252PMILF	3D model available Symbol and footprint available 3	1 Download Model

	663MILFT Renesas Electronics	1	The IDT663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the IDT674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies. The phase detector and VCO functions of the device can also be used independently. This enables the config	Small Outline Packages	663MILFT	3D model available Symbol and footprint available 3	1 Download Model
	251PMILFT Renesas Electronics	1	The IDT251 is a low cost, single-output, field programmable clock synthesizer. The IDT251 can generate an output frequency from 314 kHz to 200 MHz and may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using IDT's VersaClock™ software to configure the PLL and output, the IDT251 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 4 selectable configuration registers. The device employs Phase-Locked Loop (PLL) techniq	Small Outline Packages	251PMILFT	3D model available Symbol and footprint available 3	1 Download Model
	574MILFT Renesas Electronics	1	The 574 is a low jitter, low-skew, high performance PLL-based zero delay buffer for high speed applications. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN, the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the am	Small Outline Packages	574MILFT	3D model available Symbol and footprint available 3	1 Download Model
	85356AMILF Renesas Electronics	1	The 85356I is a dual 2:1 Differential-to-LVPECL Multiplexer. The device has both common select and individual select inputs. When COM_SEL is logic High, the CLKxx input pairs will be passed to the output. When COM_SEL is logic Low, the output is determined by the setting of the SEL0 pin for channel 0 and the SEL1 pin for Channel 1. The differential input has a common mode range that can accept most differential input types such as LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The 85356I can therefore be used as a d	Small Outline Packages	85356AMILF	3D model available Symbol and footprint available 3	1 Download Model
	502MILF Renesas Electronics	1	The 502 Loco™ is the most cost effective way to generate a high-quality, high-frequency clock output and a reference from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip's ROM is the ability to generate six different multiplicati	Small Outline Packages	502MILF	3D model available Symbol and footprint available 3	1 Download Model
	512MILFT Renesas Electronics	1	The IDT512 is the most cost effective way to generate a high quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input, and is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. With a reference output, this chip plus an inexpensive crystal can replace two oscillators.	Small Outline Packages	512MILFT	3D model available Symbol and footprint available 3	1 Download Model
	508MILF Renesas Electronics	1	The 508 is the most cost effective way to generate a high quality, high frequency CMOS clock output from a PECL clock input. The 508 has separate VDD supplies for the PECL input buffer and the output buffer, allowing different voltages to be used. For example, the input clock could use a 3.3 V supply while the output operates from 2.5V. The device has an Output Enable pin that tri-states the clock output when the OE pin is taken low. The 508 is a member of IDT's ClockBlocksTM family.	Small Outline Packages	508MILF	3D model available Symbol and footprint available 3	1 Download Model
	553MILFT Renesas Electronics	1	The 553 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	553MILFT	3D model available Symbol and footprint available 3	1 Download Model
	85322AMILFT Renesas Electronics	1	The 85322I is a Dual LVCMOS / LVTTL-to- Differential 2.5V / 3.3V LVPECL translator. The 85322I has selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85322AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	MK5811CMILFT Renesas Electronics	1	The MK5811C device generates a low EMI output clock from a clock or crystal input. The device is designed to dither a high emissions clock to lower EMI in consumer applications. Using IDT's proprietary mix of analog and digital Phase Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output and reduces the frequency amplitude peaks by several dB. The MK5811C offers both centered and down spread from a high-speed clock input. For different multiplier configurations, use the MK581	Small Outline Packages	MK5811CMILFT	3D model available Symbol and footprint available 3	1 Download Model
	853S011BMILF Renesas Electronics	1	The 853S011BI is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The 853S011BI is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S011BI ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	853S011BMILF	3D model available Symbol and footprint available 3	1 Download Model

	874S02BMILFT Renesas Electronics	1	The 874S02I is a highly versatile 1:1 Differential-to-LVDS Clock Generator and a member of the family of High Performance Clock Solutions from IDT. The 874S02I has a fully integrated PLL and can be configured as a zero delay buffer, multiplier or divider, and has an output frequency range of 62.5MHz to 1GHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external fee	Small Outline Packages	874S02BMILFT	3D model available Symbol and footprint available 3	1 Download Model
	87321AMILF Renesas Electronics	1	The 87321I is a high performance ÷1, ÷2 Differential-to-LVPECL Clock Generator and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The 87321I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed part-to-part skew characteristics make the 87321I ideal for those clock distribution applications demanding well defined performance and repeatability.	Small Outline Packages	87321AMILF	3D model available Symbol and footprint available 3	1 Download Model
	524MILFT Renesas Electronics	1	The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	524MILFT	3D model available Symbol and footprint available 3	1 Download Model
	663MILF Renesas Electronics	1	The IDT663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the IDT674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies. The phase detector and VCO functions of the device can also be used independently. This enables the config	Small Outline Packages	663MILF	3D model available Symbol and footprint available 3	1 Download Model
	83021AMILFT Renesas Electronics	1	The 83021I is a 1-to-1 Differential-to-LVCMOS/ LVTTL Translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	83021AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	85320AMILFT Renesas Electronics	1	The 85320I is a LVCMOS / LVTTL-to-Differential 3.3V, 2.5V LVPECL translator. The 85320I has a single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels and translates them to 3.3V or 2.5V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85320AMILFT	3D model available Symbol and footprint available 3	1 Download Model
	85322AMILF Renesas Electronics	1	The 85322I is a Dual LVCMOS / LVTTL-to- Differential 2.5V / 3.3V LVPECL translator. The 85322I has selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 2.5V / 3.3V LVPECL levels. The small outline 8-pin SOIC package makes this device ideal for applications where space, high performance and low power are important.	Small Outline Packages	85322AMILF	3D model available Symbol and footprint available 3	1 Download Model
	91305AMILF Renesas Electronics	1	The IDT91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz.IDT91305 is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and	Small Outline Packages	91305AMILF	3D model available Symbol and footprint available 3	1 Download Model
	501BMILF Renesas Electronics	1	The 501B Loco™ is the most cost effective way to generate a high-quality clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 15 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, allowing one chip t	Small Outline Packages	501BMILF	3D model available Symbol and footprint available 3	1 Download Model
	830S21AMILF Renesas Electronics	1	830S21I is a 1-to-1 Differential-to- LVCMOS/ LVTTL translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.	Small Outline Packages	830S21AMILF	3D model available Symbol and footprint available 3	1 Download Model
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