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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71V416S12BEG8 Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	BGA	71V416S12BEG8	3D model available Symbol and footprint available 3	1 Download Model
	71V2556SA100BG Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2556SA100BG	3D model available Symbol and footprint available 3	1 Download Model
	70T3319S133BC8 Renesas Electronics	1	The 70T3319 is a high-speed 256K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3319 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3319S133BC8	3D model available Symbol and footprint available 3	1 Download Model
	70V7519S133BC Renesas Electronics	1	The 70V7519 is a high-speed 256K x 36 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4Kx36 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4Kx36 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7519S133BC	3D model available Symbol and footprint available 3	1 Download Model

	7130LA25PFGI Renesas Electronics	1	The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535	Quad Flat Packages	7130LA25PFGI	3D model available Symbol and footprint available 3	1 Download Model
	N01S830BAT22I onsemi	1	SRAM, Synchronous SRAM, 1 MB, 128K x 8bit, TSSOP, 8 Pins, 2.5V to 5.5V , 20 MHz , -40°C to +85°C	Small Outline Packages	N01S830BAT22I	3D model available Symbol and footprint available 3	1 Download Model
	71256L85TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L85TDB	3D model not available Symbol and footprint available 2	1 Download Model
	71V2556S150PFGI Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V2556S150PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7164S35TDB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164S35TDB	3D model not available Symbol and footprint available 2	1 Download Model
	5962-3829408MXA Renesas Electronics	1	The 5962-38294 (7164 SRAM) is organized as 8K x 8 and offers a reduced power standby mode. The low-power version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation.	Ceramic Dual-In-Line Packages	5962-3829408MXA	3D model not available Symbol and footprint available 2	1 Download Model
	709159L7BFI Renesas Electronics	1	The 709159 is a high-speed 8K x 9 bit synchronous Dual-Port SRAM that has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The 709159 utilizes a 9-bit wide data path to allow for parity which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to ent	BGA	709159L7BFI	3D model available Symbol and footprint available 3	1 Download Model
	7143SA35GB Renesas Electronics	1	The 7143 is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7143SA35GB	3D model available Symbol and footprint available 3	1 Download Model
	70T3519S133BF8 Renesas Electronics	1	The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3519S133BF8	3D model available Symbol and footprint available 3	1 Download Model
	70V07L55G Renesas Electronics	1	The 70V07 is a high-speed 32K x 8 Dual-Port Static RAM designed to be used as a stand-alone 256K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-or-more word systems which results in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Other	70V07L55G	3D model available Symbol and footprint available 3	1 Download Model
	6116LA90DB Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Dual-In-Line Packages	6116LA90DB	3D model available Symbol and footprint available 3	1 Download Model

	71V547S100PFG Renesas Electronics	1	The 71V547 3.3V CMOS SRAM is organized as 128K x 36 bits. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turn-around. The 71V547 contains address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V547S100PFG	3D model available Symbol and footprint available 3	1 Download Model
	5962-8855206XA Renesas Electronics	1	The 5962-88552 (71256 SRAM) is organized as 32K x 8. This part offers a reduced power standby mode for significant system level power and cooling savings. It also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Ceramic Dual-In-Line Packages	5962-8855206XA	3D model not available Symbol and footprint available 2	1 Download Model
	70V3589S166DRG8 Renesas Electronics	1	The 70V3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	Quad Flat Packages	70V3589S166DRG8	3D model available Symbol and footprint available 3	1 Download Model
	70V35L20PFGI8 Renesas Electronics	1	The 70V35 is a high-speed 8K x 18 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V35L20PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71256L35TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L35TDB	3D model not available Symbol and footprint available 2	1 Download Model
	70V3599S133BF8 Renesas Electronics	1	The 70V3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3599S133BF8	3D model available Symbol and footprint available 3	1 Download Model
	7025L70GB Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7025L70GB	3D model available Symbol and footprint available 3	1 Download Model
	70V05L15PFG Renesas Electronics	1	The 70V05 is a high-speed 8K x 8 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-or-more word systems which results in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V05L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	70T651S15BF Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S15BF	3D model available Symbol and footprint available 3	1 Download Model
	71V416S15YGI Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V416S15YGI	3D model available Symbol and footprint available 3	1 Download Model
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