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Image Part Number D.S Description Package Category Prices / Stock Model Action
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850S1201BGILF Renesas Electronics
1 The 850S1201I is a low skew12:1 Single-ended Clock Multiplexer. The 850S1201I has 12 selectable single-ended clock inputs and 1 single-ended clock output. The device operates up to 250MHz and is packaged in a 20 TSSOP package. Small Outline Packages 850S1201BGILF 1 Download Model
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8T349316NLGI Renesas Electronics
1 The 8T349316 is a 2.5V differential clock buffer with sixteen LVDS outputs. The fanout from a differential input to the sixteen LVDS outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The 8T349316 can act as a translator from a differential HSTL, LVPECL, CML or LVDS input to LVDS output signals. A single-ended 3.3V, 2.5V LVCMOS/LVTTL input can also be used to translate to LVDS outputs. The redundant input capability allows for an asynchronous change-over fr Quad Flat No-Lead 8T349316NLGI 1 Download Model
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851S201CKILF Renesas Electronics
1 The 851S201I is a high performance 2:2 Differential-to-HCSL Multiplexer with a 2 output fanout buffer. The 851S201I operates up to 250MHz and accepts HCSL and other low level differential inputs levels. Input level detection circuitry is available to flag input levels that drops below a specified value and on the selected input. This signal is latched until the status is reset via the alarm reset input. The 851S201I is packaged in a small 3 x 3 mm 16 lead VFQFN package, making it ideal for use on space cons Quad Flat No-Lead 851S201CKILF 1 Download Model
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9DBU0541AKILFT Renesas Electronics
1 The 9DBU0541 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated terminations for direct connection to 100 ohm transmission lines. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. Quad Flat No-Lead 9DBU0541AKILFT 1 Download Model
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9DBL0853ANDGI8 Renesas Electronics
1 The 9DBL0853 Zero-Delay/Fanout buffer is a low-power high-performance member of Renesas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0851. For information regarding evaluation boards and material, please contact your local sales representative.  Quad Flat No-Lead 9DBL0853ANDGI8 1 Download Model
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527R-03LFT Renesas Electronics
1 The 527-03 is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-03 aligns rising edges on CLKIN with FBPECL at a ratio determined by the referenc Small Outline Packages 527R-03LFT 1 Download Model
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9DMV0441AKILFT Renesas Electronics
1 The 9DMV0441 is a member of IDT's SOC-Friendly 1.8 V Very-Low-Power (VLP) PCIe Gen1-2-3 family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. Each of the 4 outputs has its own dedicated OE# pin for optimal system control and power management. The part provides asynchronous and glitch-free switching modes. Quad Flat No-Lead 9DMV0441AKILFT 1 Download Model
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9DBL0455NLGI8 Renesas Electronics
1 The device is a 4-output PCIe clock fanout buffers for PCIe Gen1–5 applications. It has an open drain Loss of Signal (LOS) output to indicate the absence or presence of an input clock. For information regarding evaluation boards and material, please contact your local sales representative.  Quad Flat No-Lead 9DBL0455NLGI8 1 Download Model
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9DB233AGLF Renesas Electronics
1 The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D Small Outline Packages 9DB233AGLF 1 Download Model
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5T907PAGI Renesas Electronics
1 The IDT5T907 2.5V single data rate (SDR) clock buffer is a user-selectable single-ended or differential input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single or differential input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The IDT5T907 can act as a translator from a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to Small Outline Packages 5T907PAGI 1 Download Model
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8316AKLF Renesas Electronics
1 The 8316 is a low skew, 1-to-16 LVCMOS/LVTTL Fanout Buffer with 1.2V LVCMOS Outputs and a member of the family of High Performance Clock Solutions from IDT. The 8316 single ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. Guaranteed output and part-to-part skew characteristics along with the 1.2V output makes the 8316 ideal for high performance, single ended applications that also require a li Quad Flat No-Lead 8316AKLF 1 Download Model
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8343AY-01LF Renesas Electronics
1 The 8343-01 is a low skew, 1-to-16 LVCMOS/ LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8343-01 single ended clock input accepts LVCMOS or LVTTL input levels. The 8343-01 operates at 3.3V, 2.5V and mixed 3.3V input and 2.5V supply modes over the commercial temperature range. Guaranteed output and part-to-part skew characteristics make the 8343-01 ideal for those clock distribution applications demanding well defined performance and repeatability. Quad Flat Packages 8343AY-01LF 1 Download Model
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830S21AMILFT Renesas Electronics
1 830S21I is a 1-to-1 Differential-to- LVCMOS/ LVTTL translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space. Small Outline Packages 830S21AMILFT 1 Download Model
Part Image Part Image 1 Input Data Rate > 11 Gb/s Typical; Data Dependent Jitter < 15 ps; Maximum Input Clock Frequency > 8 GHz Typical; Random Clock Jitter < 0.8 ps RMS; Low Skew 1:2 LVPECL Outputs, < 10 ps max; 4:1 MultiLevel Mux Inputs, Accepts LVPECL, CML LVDS; 150 ps Typical Propagation Delay; Differential LVPECL Outputs, 750 mV Peak-to-Peak, Typical; Operating Range: VCC = 2.375 V to 3.6 V; Internal 50-ohm Input Termination Resistors; VREFAC Reference Output; 40C to +85C Ambient Operating Temperature Quad Flat No-Lead NB7L572MNG 1 Download Model
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9DB423BFLF Renesas Electronics
1 The 9DB423 is compatible with the Intel DB400Q Differential Buffer Specification. This buffer provides 4 PCI-Express SRC or 4 QPI clocks. The 9DB423 is driven by a differential output pair from a CK410B+ or CK509B main clock generator. Small Outline Packages 9DB423BFLF 1 Download Model
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557GI-08LF Renesas Electronics
1 The 557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) input pairs and fans out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-Express clock either locally from the PCI-E card or from the motherboard. Small Outline Packages 557GI-08LF 1 Download Model
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87002AG-02LF Renesas Electronics
1 The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider Small Outline Packages 87002AG-02LF 1 Download Model
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5PB1110PGGI8 Renesas Electronics
1 The 5PB1110 is a high-performance 1:10 LVCMOS clock buffer. It has best-in-class Additive Phase Jitter of 50 fsec RMS. The 5PB1110 also supports an Output Enable function. It is available in 20-pin QFN and TSSOP packages and can operate from a 1.8 V to 3.3 V supply.  Small Outline Packages 5PB1110PGGI8 1 Download Model
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557GI-08LFT Renesas Electronics
1 The 557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) input pairs and fans out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-Express clock either locally from the PCI-E card or from the motherboard. Small Outline Packages 557GI-08LFT 1 Download Model
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9DBV0531AKILFT Renesas Electronics
1 The 9DBV0531is a member of IDT's Full-Featured PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. Quad Flat No-Lead 9DBV0531AKILFT 1 Download Model
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850S1201BGILFT Renesas Electronics
1 The 850S1201I is a low skew12:1 Single-ended Clock Multiplexer. The 850S1201I has 12 selectable single-ended clock inputs and 1 single-ended clock output. The device operates up to 250MHz and is packaged in a 20 TSSOP package. Small Outline Packages 850S1201BGILFT 1 Download Model
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8V79S674NLGI Renesas Electronics
1 The 8V79S674 is a clock divider and fanout buffer. The device has been designed for clock signal division in wireless base station radio equipment boards. The device is optimized to deliver excellent additive phase jitter performance. The 8V79S674 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection. The device offers the frequency division by ÷1, ÷2, ÷4 and ÷8. Four low-skew LVPECL outputs are available and support cloc Quad Flat No-Lead 8V79S674NLGI 1 Download Model
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9DB104BFLF Renesas Electronics
1 9DB104 is not recommended for new designs. Small Outline Packages 9DB104BFLF 1 Download Model
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580G-01LF Renesas Electronics
1 The 580-01 is a clock multiplexer (mux) designed to switch between two clock sources with no glitches or short pulses. The operation of the mux is controlled by an input pin but the part can also be configured to switch automatically if one of the input clocks stops. The part also provides clock detection by reporting when an input clock has stopped. For a clock mux with zero delay and smooth switching, see either the 581-01 or the 581-02. Small Outline Packages 580G-01LF 1 Download Model
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RC19016A100GN1#KB0 Renesas Electronics
1 The RC19016 is a 16-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19016 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design.  Quad Flat No-Lead RC19016A100GN1#KB0 1 Download Model
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