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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	49FCT20805PYGI Renesas Electronics	1	The FCT20805 is a 2.5 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT20805 offers low capacitance inputs. The FCT20805 is designed for high speed clock distribution where signal quality and skew are critical. The	Small Outline Packages	49FCT20805PYGI	3D model available Symbol and footprint available 3	1 Download Model
	9DBL0442CKILF Renesas Electronics	1	The 9DBL0442 4-output zero-delay/fan-out buffer is a 3.3V member of Renesas' Full-Featured PCIe family. The 9DBL0442 supports PCIe Gen1 through Gen5 and both Common and Independent Reference Clock architectures. For information regarding evaluation boards and material, please contact your local sales representative.	Quad Flat No-Lead	9DBL0442CKILF	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-2DCGI8 Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-2DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	9DBV0541AKILFT Renesas Electronics	1	The 9DBV0541 is a member of IDT's Full-Featured PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. It has integrated terminations for direct connection to 100ohm transmission lines.	Quad Flat No-Lead	9DBV0541AKILFT	3D model available Symbol and footprint available 3	1 Download Model

	9DB1233AGLFT Renesas Electronics	1	The 9DB1233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.	Small Outline Packages	9DB1233AGLFT	3D model available Symbol and footprint available 3	1 Download Model
	RC19204AGNL#BB0 Renesas Electronics	1	The RC19204 is a 2:4 PCIe Gen6 multiplexer that is backward compatible to earlier PCIe generations. The RC19204 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design.	Quad Flat No-Lead	RC19204AGNL#BB0	3D model available Symbol and footprint available 3	1 Download Model
	RC19302AGNT#KD0 Renesas Electronics	1	The RC19302 is a 2:2 PCIe Gen7 multiplexer that is backward compatible with earlier PCIe generations. The RC19302 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust designs.	Quad Flat No-Lead	RC19302AGNT#KD0	3D model available Symbol and footprint available 3	1 Download Model
	570ALF Renesas Electronics	1	The IDT570 is a high-performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. The A version is recommended for 5 V designs and the B version for 3.3 V designs. The chip is part of IDT's ClockBlocks™ family, and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appea	Small Outline Packages	570ALF	3D model available Symbol and footprint available 3	1 Download Model
	9DMV0431AKILF Renesas Electronics	1	The 9DMV0431 is a member of IDT's SOC-Friendly 1.8 V Very-Low-Power (VLP) PCIe Gen1-2-3 family. Each of the 4 outputs has its own dedicated OE# pin for optimal system control and power management. The part provides asynchronous and glitch-free switching modes.	Quad Flat No-Lead	9DMV0431AKILF	3D model available Symbol and footprint available 3	1 Download Model
	9ZX21901DKLFT Renesas Electronics	1	The 9ZX21901D is a second generation DB1900Z differential buffer for Intel Purley and newer platforms. The part is backwards compatible to the 9ZX21901C while offering much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. In bypass mode, the 9ZX21901D can provide outputs up to 400MHz.	Quad Flat No-Lead	9ZX21901DKLFT	3D model available Symbol and footprint available 3	1 Download Model
	9DBU0531AKLF Renesas Electronics	1	The 9DBU0531 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses.	Quad Flat No-Lead	9DBU0531AKLF	3D model available Symbol and footprint available 3	1 Download Model
	870919BVILF Renesas Electronics	1	The 870919I is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also be	Plastic Leaded Chip Carrier	870919BVILF	3D model not available Symbol and footprint available 2	1 Download Model
	527R-01ILF Renesas Electronics	1	The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MH	Small Outline Packages	527R-01ILF	3D model available Symbol and footprint available 3	1 Download Model
	RC19108AGND#KB0 Renesas Electronics	1	The RC19108 is a 1.8V 8-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19108 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.	Quad Flat No-Lead	RC19108AGND#KB0	3D model available Symbol and footprint available 3	1 Download Model
	8V74S4622NLGI8 Renesas Electronics	1	The 8V74S4622 is a versatile Clock Fanout Buffer/Frequency Divider. The device supports the selection, division and distribution of high-frequency clock signals with very low additive phase noise. The 8V74S4622 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection and internal isolation. Two selectable inputs are supported for differential and single ended clocks. Each of the two outputs can select a copy or a frequency-d	Quad Flat No-Lead	8V74S4622NLGI8	3D model available Symbol and footprint available 3	1 Download Model

	9DBL0951BKILF Renesas Electronics	1	The 9DBL0951 device is a member of IDT's 3.3V full-featured PCIe clock family. The 9DBL0951 device supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. The device's integrated output terminations provide a direct connection to 85Ω transmission lines. The 9DBL09P1 can be factory programmed with a user-defined power up default SMBus configuration.For information regarding evaluation boards and material, please contact your local IDT sales representative.	Quad Flat No-Lead	9DBL0951BKILF	3D model available Symbol and footprint available 3	1 Download Model
	97ULP845AHLF Renesas Electronics	1	Low skew, low jitter PLL clock driver; 1 to 5 differential clock distribution (SSTL_18)	BGA	97ULP845AHLF	3D model available Symbol and footprint available 3	1 Download Model
	9ZXL1530BKLF Renesas Electronics	1	The 9ZXL1530 is a low-power version of the 9ZX21501. It has 15 low-power HCSL-compatible outputs and meets all the performance requirements of the Intel DB1900Z specification, while reducing power consumption more than 50% from the original IDT9ZX21501. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications.	Quad Flat No-Lead	9ZXL1530BKLF	3D model available Symbol and footprint available 3	1 Download Model
	NB7V33MMNG onsemi	1	Maximum Input Clock Frequency > 10 GHz, typical; 260 ps Typical Propagation Delay; 35 ps Typical Rise and Fall Times; Differential CML Outputs, 400 mV peaktopeak, typical; Internal 50-ohm Input Termination Resistors; Random Clock Jitter < 0.8 ps RMS; 40C to +85C Ambient Operating Temperature	Quad Flat No-Lead	NB7V33MMNG	3D model available Symbol and footprint available 3	1 Download Model
	RC19024AGNQ#BB0 Renesas Electronics	1	The RC19024 is a 24-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19024 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design.	Other	RC19024AGNQ#BB0	3D model available Symbol and footprint available 3	1 Download Model
	552AR-01LFT Renesas Electronics	1	The 552A-01 produces 8 low-skew copies of the multiple input clock or fundamental, parallel-mode crystal. Unlike other clock drivers, these parts do not require a separate oscillator for the input. Using IDT's patented Phase-Locked Loop (PLL) to multiply the input frequency, it is ideal for generating and distributing multiple high-frequency clocks. This is a single chip used for 3 different applications: 1) 552A-01 (A mode) — an Oscillator mutiplier 2) 552A-01 (B mode) — a Dual 1:4 buffer 3) 552A-01 (C mod	Small Outline Packages	552AR-01LFT	3D model available Symbol and footprint available 3	1 Download Model
	NB6L14SMNG onsemi	1	Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gbps; 1ps Maximum of RMS Clock Jitter; 120ps Typical Rise and Fall Times; VREFAC Reference Output	Quad Flat No-Lead	NB6L14SMNG	3D model available Symbol and footprint available 3	1 Download Model
	854S036AKLFT Renesas Electronics	1	The 854S036 is a low skew, high performance Dual Differential-to-LVDS Fanout Buffer. One of the two fanout buffers has 3 LVDS outputs, the other has 6 LVDS outputs. The PCLKx, nPCLKx pairs can accept most standard differential input levels. The 854S036 is characterized to operate from a 3.3V power supply. Guaranteed output and bank skew characteristics make the 854S036 ideal for those clock distribution applications demanding well defined performance and repeatability.	Quad Flat No-Lead	854S036AKLFT	3D model available Symbol and footprint available 3	1 Download Model
	HMC720LP3ETR Analog Devices	1	13 Gbps Fast Rise Time 1:2 Fanout Buffer with Programmable Output Voltage	Quad Flat No-Lead	HMC720LP3ETR	3D model not available Symbol and footprint available 2	1 Download Model
	2308-5HDCGI Renesas Electronics	1	The 2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The 2308 has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the i	Small Outline Packages	2308-5HDCGI	3D model available Symbol and footprint available 3	1 Download Model
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