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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72V3640L7-5BB Renesas Electronics	1	The 72V3640 1K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3640L7-5BB	3D model available Symbol and footprint available 3	1 Download Model
	7281L15PAGI Renesas Electronics	1	The 7281 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7281L15PAGI	3D model available Symbol and footprint available 3	1 Download Model
	72V3670L6PFG Renesas Electronics	1	The 72V3670 8K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3670L6PFG	3D model available Symbol and footprint available 3	1 Download Model
	7202LA15JGI Renesas Electronics	1	The 7202 is a 1K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	7202LA15JGI	3D model not available Symbol and footprint available 2	1 Download Model

	72T18105L6-7BB Renesas Electronics	1	The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T18105L6-7BB	3D model available Symbol and footprint available 3	1 Download Model
	72V36100L6PFG Renesas Electronics	1	The 72V36100 64K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V36100L6PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V235L10PFG8 Renesas Electronics	1	The 72V235 is a 2K x 18 first-in, first-out memory with clocked read and write controls. It is a 3.3V version of the 72235 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock(RCLK) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.	Quad Flat Packages	72V235L10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V03L25JGI Renesas Electronics	1	The 72V03 is a 2K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	72V03L25JGI	3D model available Symbol and footprint available 3	1 Download Model
	72T1895L4-4BBG Renesas Electronics	1	Asynchronous, Synchronous FIFO 1.125M (64K x 18)(128K x 9) Uni-Directional 100MHz, 225MHz 8ns, 3.4ns 144-PBGA (13x13)	BGA	72T1895L4-4BBG	3D model available Symbol and footprint available 3	1 Download Model
	CD74HCT40105MT Texas Instruments	1	TEXAS INSTRUMENTS - CD74HCT40105MT - FIFO, 15MHZ, SOIC-16	Small Outline Packages	CD74HCT40105MT	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT7802-60FN Texas Instruments	1	FIFO 1024 X 18 Synch FIFO Memory	Plastic Leaded Chip Carrier	SN74ACT7802-60FN	3D model not available Symbol and footprint available 2	1 Download Model
	SN74ACT7805-40DLR Texas Instruments	1	FIFO 256 x 18 synchronous FIFO memory	Small Outline Packages	SN74ACT7805-40DLR	3D model available Symbol and footprint available 3	1 Download Model
	SN74ALVC7806-40DL Texas Instruments	1	FIFO Mem Async Dual Width Uni-Dir 256 x 18 56-Pin SSOP Tube	Small Outline Packages	SN74ALVC7806-40DL	3D model available Symbol and footprint available 3	1 Download Model
	SN74V215-15PAG Texas Instruments	1	Texas Instruments SN74V215-15PAG, FIFO Memory, Dual, 512 x 18, Uni-Directional 10ns 66.7MHz, 3 → 3.6 V, 64-Pin	Quad Flat Packages	SN74V215-15PAG	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT7806-20DL Texas Instruments	1	FIFO Mem Async Dual Width Uni-Dir 256 x 18 56-Pin SSOP Tube	Small Outline Packages	SN74ACT7806-20DL	3D model available Symbol and footprint available 3	1 Download Model

	72V3640L6BBG Renesas Electronics	1	FIFO 1K x 36 SuperSync II FIFO, 3.3V	BGA	72V3640L6BBG	3D model available Symbol and footprint available 3	1 Download Model
	SN74V293PZAEP Texas Instruments	1	Enhanced Product 65536 X 18 Synchronous Fifo Memory	Quad Flat Packages	SN74V293PZAEP	3D model available Symbol and footprint available 3	1 Download Model
	SN74V235-7PAG Texas Instruments	1	2048 x 18 Synchronous FIFO Memory	Quad Flat Packages	SN74V235-7PAG	3D model available Symbol and footprint available 3	1 Download Model
	SN74LS224AN3 Texas Instruments	1	ti SN74LS224A, 16 X 4 Synchronous Fifo Memory With 3-State Outputs	Dual-In-Line Packages	SN74LS224AN3	3D model available Symbol and footprint available 3	1 Download Model
	CD40105BE Texas Instruments	1	CMOS 4-Bit-by-16-Word FIFO Register	Dual-In-Line Packages	CD40105BE	3D model available Symbol and footprint available 3	1 Download Model
	7201LA15TPGI Renesas Electronics	1	FIFO 512 x 9 AsyncFIFO 5.0V 9 Dual 12ns	Dual-In-Line Packages	7201LA15TPGI	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT7805-25DL Texas Instruments	1	FIFO 256 x 18 synchronous FIFO memory	Small Outline Packages	SN74ACT7805-25DL	3D model available Symbol and footprint available 3	1 Download Model
	CD40105BF Texas Instruments	1	FIFO Register Single 4-CH CMOS 16-Pin CDIP Tube	Ceramic Dual-In-Line Packages	CD40105BF	3D model available Symbol and footprint available 3	1 Download Model
	SN74V293-15PZA Texas Instruments	1	FIFO Mem Sync Dual Depth/Width Uni-Dir 64K x 18/128K x 9 80-Pin LQFP Tray	Quad Flat Packages	SN74V293-15PZA	3D model available Symbol and footprint available 3	1 Download Model
	SN74ALVC7805-20DL Texas Instruments	1	FIFO 16-Bit Reg Trnscvr With 3-State Outputs	Small Outline Packages	SN74ALVC7805-20DL	3D model available Symbol and footprint available 3	1 Download Model
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