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72V275L15TFGI8
Renesas Electronics
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1 | The 72V275 is a 32K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72275 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee | Quad Flat Packages | 72V275L15TFGI8 |
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72V36110L7-5BB
Renesas Electronics
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1 | The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. | BGA | 72V36110L7-5BB |
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72V255LA15PFGI
Renesas Electronics
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1 | The 72V255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72255 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee | Quad Flat Packages | 72V255LA15PFGI |
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72281L10PFG8
Renesas Electronics
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1 | The 72281 is a 64K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperS | Quad Flat Packages | 72281L10PFG8 |
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72265LA10PFG8
Renesas Electronics
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1 | The 72265 is a 16K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data | Quad Flat Packages | 72265LA10PFG8 |
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7284L15PAGI
Renesas Electronics
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1 | The 7284 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Small Outline Packages | 7284L15PAGI |
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7202LA15JGI
Renesas Electronics
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1 | The 7202 is a 1K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. | Plastic Leaded Chip Carrier | 7202LA15JGI |
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72T18105L6-7BB
Renesas Electronics
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1 | The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode. | BGA | 72T18105L6-7BB |
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72V295L10PFG
Renesas Electronics
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1 | The 72V295 is an 128K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data. | Quad Flat Packages | 72V295L10PFG |
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SN74ACT7802-60FN
Texas Instruments
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1 | FIFO 1024 X 18 Synch FIFO Memory | Plastic Leaded Chip Carrier | SN74ACT7802-60FN |
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SN74ACT7805-40DLR
Texas Instruments
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1 | FIFO 256 x 18 synchronous FIFO memory | Small Outline Packages | SN74ACT7805-40DLR |
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72T1895L4-4BBG
Renesas Electronics
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1 | Asynchronous, Synchronous FIFO 1.125M (64K x 18)(128K x 9) Uni-Directional 100MHz, 225MHz 8ns, 3.4ns 144-PBGA (13x13) | BGA | 72T1895L4-4BBG |
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72V3640L6BBG
Renesas Electronics
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1 | FIFO 1K x 36 SuperSync II FIFO, 3.3V | BGA | 72V3640L6BBG |
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SN74ACT7806-20DL
Texas Instruments
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1 | FIFO Mem Async Dual Width Uni-Dir 256 x 18 56-Pin SSOP Tube | Small Outline Packages | SN74ACT7806-20DL |
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CD74HCT40105MT
Texas Instruments
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1 | TEXAS INSTRUMENTS - CD74HCT40105MT - FIFO, 15MHZ, SOIC-16 | Small Outline Packages | CD74HCT40105MT |
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SN74V215-15PAG
Texas Instruments
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1 | Texas Instruments SN74V215-15PAG, FIFO Memory, Dual, 512 x 18, Uni-Directional 10ns 66.7MHz, 3 → 3.6 V, 64-Pin | Quad Flat Packages | SN74V215-15PAG |
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SN74V235-7PAG
Texas Instruments
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1 | 2048 x 18 Synchronous FIFO Memory | Quad Flat Packages | SN74V235-7PAG |
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SN74V293PZAEP
Texas Instruments
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1 | Enhanced Product 65536 X 18 Synchronous Fifo Memory | Quad Flat Packages | SN74V293PZAEP |
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SN74ALVC7806-40DL
Texas Instruments
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1 | FIFO Mem Async Dual Width Uni-Dir 256 x 18 56-Pin SSOP Tube | Small Outline Packages | SN74ALVC7806-40DL |
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SN74LS224AN3
Texas Instruments
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1 | ti SN74LS224A, 16 X 4 Synchronous Fifo Memory With 3-State Outputs | Dual-In-Line Packages | SN74LS224AN3 |
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CD40105BF
Texas Instruments
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1 | FIFO Register Single 4-CH CMOS 16-Pin CDIP Tube | Ceramic Dual-In-Line Packages | CD40105BF |
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SN74ACT7805-25DL
Texas Instruments
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1 | FIFO 256 x 18 synchronous FIFO memory | Small Outline Packages | SN74ACT7805-25DL |
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7201LA15TPGI
Renesas Electronics
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1 | FIFO 512 x 9 AsyncFIFO 5.0V 9 Dual 12ns | Dual-In-Line Packages | 7201LA15TPGI |
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SN74V293-15PZA
Texas Instruments
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1 | FIFO Mem Sync Dual Depth/Width Uni-Dir 64K x 18/128K x 9 80-Pin LQFP Tray | Quad Flat Packages | SN74V293-15PZA |
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72V285L15PFGI8
Renesas Electronics
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1 | IC MEM FIFO 65536X18 64-TQFP | Quad Flat Packages | 72V285L15PFGI8 |
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