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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72V3632L10PFG Renesas Electronics	1	The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	72V3632L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V3623L10PFG8 Renesas Electronics	1	The 72V3623 is a 256 x 36 Sync FIFO that is a 3.3V version of the 723623. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. These devices can operate in the IDT Standard mode word or First Word Fall Through mode.	Quad Flat Packages	72V3623L10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V36110L6BBG Renesas Electronics	1	The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36110L6BBG	3D model available Symbol and footprint available 3	1 Download Model
	72V3660L7-5BBI Renesas Electronics	1	The 72V3660 4K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3660L7-5BBI	3D model available Symbol and footprint available 3	1 Download Model

	72V36100L6BB8 Renesas Electronics	1	The 72V36100 64K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36100L6BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V3631L15PFG Renesas Electronics	1	The 72V3631is a 512 x 36 Sync FIFO memory that is a 3.3V version of the 723631. It supports clock frequencies up to 67 MHz and has read access times as fast as 10ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. The FIFO operates in First Word Fall Through mode. Communication between each port may take place with two 36-bit mailbox registers. The enables for each port are arranged to provide a simple interface between microprocessors and/or buses with syn	Quad Flat Packages	72V3631L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V36100L6BBG Renesas Electronics	1	The 72V36100 64K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36100L6BBG	3D model available Symbol and footprint available 3	1 Download Model
	72V3612L12PFG Renesas Electronics	1	The 72V3612 is a 3.3V version of the 723612. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip buffer data in opposite directions. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bi-directional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	72V3612L12PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V36110L7-5BBGI8 Renesas Electronics	1	The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36110L7-5BBGI8	3D model available Symbol and footprint available 3	1 Download Model
	72V36110L6BB Renesas Electronics	1	The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36110L6BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3631L15PFG8 Renesas Electronics	1	The 72V3631is a 512 x 36 Sync FIFO memory that is a 3.3V version of the 723631. It supports clock frequencies up to 67 MHz and has read access times as fast as 10ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. The FIFO operates in First Word Fall Through mode. Communication between each port may take place with two 36-bit mailbox registers. The enables for each port are arranged to provide a simple interface between microprocessors and/or buses with syn	Quad Flat Packages	72V3631L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V3672L10PFG8 Renesas Electronics	1	The 72V3672 Bidirectional SyncFIFO (clocked) memory is a 3.3V version of the 723672. Two independent 8K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	72V3672L10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V3660L6PFG8 Renesas Electronics	1	The 72V3660 4K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3660L6PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V3650L6PFG Renesas Electronics	1	The 72V3650 2K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3650L6PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V3623L10PFG Renesas Electronics	1	The 72V3623 is a 256 x 36 Sync FIFO that is a 3.3V version of the 723623. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers. These devices can operate in the IDT Standard mode word or First Word Fall Through mode.	Quad Flat Packages	72V3623L10PFG	3D model available Symbol and footprint available 3	1 Download Model

	72V3680L7-5BB8 Renesas Electronics	1	The 72V3680 16K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3680L7-5BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V3680L6BBG8 Renesas Electronics	1	The 72V3680 16K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3680L6BBG8	3D model available Symbol and footprint available 3	1 Download Model
	72V36100L7-5BB8 Renesas Electronics	1	The 72V36100 64K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36100L7-5BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V36110L7-5BB8 Renesas Electronics	1	The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36110L7-5BB8	3D model available Symbol and footprint available 3	1 Download Model
	72V3660L7-5PFGI8 Renesas Electronics	1	The 72V3660 4K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3660L7-5PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72V3640L6BB Renesas Electronics	1	The 72V3640 1K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3640L6BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3650L6BB Renesas Electronics	1	The 72V3650 2K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3650L6BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3690L6PFG8 Renesas Electronics	1	The 72V3690 32K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	Quad Flat Packages	72V3690L6PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72V3670L7-5BB Renesas Electronics	1	The 72V3670 8K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3670L7-5BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3611L15PFG8 Renesas Electronics	1	The 72V3611 is a 64 x 36 3.3V Sync FIFO memory which supports clock frequencies up to 67MHz and has read access times as fast as 10ns. Communication between each port can take place through two 36-bit mailbox registers. Two or more devices may be used in parallel to create wider data paths. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with	Quad Flat Packages	72V3611L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
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