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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	74FCT388915TCPYG Renesas Electronics	1	The FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max. The FCT388915T provides 8 out	Small Outline Packages	74FCT388915TCPYG	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805ASOG8 Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805ASOG8	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805EPYGI8 Renesas Electronics	1	The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3	Small Outline Packages	49FCT3805EPYGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT388915TDPYG Renesas Electronics	1	The FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max. The FCT388915T provides 8 out	Small Outline Packages	74FCT388915TDPYG	3D model available Symbol and footprint available 3	1 Download Model

	74FCT38072DCGI Renesas Electronics	1	The FCT38072 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:2 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT38072DCGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT388915TBJG Renesas Electronics	1	The FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max. The FCT388915T provides 8 out	Plastic Leaded Chip Carrier	74FCT388915TBJG	3D model not available Symbol and footprint available 2	1 Download Model
	74FCT3807EPGGI Renesas Electronics	1	The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807EPGGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38074DCGI8 Renesas Electronics	1	The FCT38074 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:4 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT38074DCGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807QG Renesas Electronics	1	The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807QG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SPYGI Renesas Electronics	1	The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec.	Small Outline Packages	74FCT3807SPYGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SQGI Renesas Electronics	1	The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec.	Small Outline Packages	74FCT3807SQGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807DPYGI Renesas Electronics	1	The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807DPYGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT38075SCMGI8 Renesas Electronics	1	The 74FCT38075S is a low skew, single input to five output, LVCMOS clock buffer. The 74FCT38075S has best in class additive phase Jitter of sub 50 fsec.	Small Outline No-lead	74FCT38075SCMGI8	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805APYG8 Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805APYG8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SOG8 Renesas Electronics	1	The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807SOG8	3D model available Symbol and footprint available 3	1 Download Model

	74FCT38074SCMGI Renesas Electronics	1	The 74FCT38074S is a low skew, single input to four output, LVCMOS clock buffer. The 74FCT38074S has best in class additive phase Jitter of sub 50 fsec.	Small Outline No-lead	74FCT38074SCMGI	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805SOG Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805SOG	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805AQGI8 Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805AQGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807EQGI8 Renesas Electronics	1	The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807EQGI8	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805PYGI Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805PYGI	3D model available Symbol and footprint available 3	1 Download Model
	74FCT388915TEPYG Renesas Electronics	1	The FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max. The FCT388915T provides 8 out	Small Outline Packages	74FCT388915TEPYG	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807SOG Renesas Electronics	1	The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807SOG	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805EQGI8 Renesas Electronics	1	The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3	Small Outline Packages	49FCT3805EQGI8	3D model available Symbol and footprint available 3	1 Download Model
	MABA-010441-CT38A0 MACOM	1	Audio Transformers / Signal Transformers 5-1200MHz 1:3 Imped. 50 or 75 Ohm	Other	MABA-010441-CT38A0	3D model available Symbol and footprint available 3	1 Download Model
	IDT74FCT3807ASOGI Renesas Electronics	1	IDT74FCT3807ASOGI, Clock Buffer CMOS, TTL, 20-Pin SOIC	Small Outline Packages	IDT74FCT3807ASOGI	3D model available Symbol and footprint available 3	1 Download Model
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