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87002AG-02LF
Renesas Electronics
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1 | The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider | Small Outline Packages | Check Price & Stock |
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87002AG-02LFT
Renesas Electronics
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1 | The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider and has an input and output frequency range of 15.625MHz to 250MHz. The reference divider, feedback divider and output divider | Small Outline Packages | Check Price & Stock |
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74FCT38072DCGI8
Renesas Electronics
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1 | The FCT38072 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:2 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. | Small Outline Packages | Check Price & Stock |
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8P34S1204NLGI8
Renesas Electronics
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1 | The 8P34S1204 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals. The 8P34S1204 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1204 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable diffe | Quad Flat No-Lead | Check Price & Stock |
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9DB233AGLF
Renesas Electronics
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1 | The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (OE#) pins make the 9D | Small Outline Packages | Check Price & Stock |
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8343AY-01LF
Renesas Electronics
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1 | The 8343-01 is a low skew, 1-to-16 LVCMOS/ LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8343-01 single ended clock input accepts LVCMOS or LVTTL input levels. The 8343-01 operates at 3.3V, 2.5V and mixed 3.3V input and 2.5V supply modes over the commercial temperature range. Guaranteed output and part-to-part skew characteristics make the 8343-01 ideal for those clock distribution applications demanding well defined performance and repeatability. | Quad Flat Packages | Check Price & Stock |
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671M-01LF
Renesas Electronics
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1 | Zero Delay, Low Skew Buffer and Multiplier | Small Outline Packages | Check Price & Stock |
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8T49N488A-999ASGI
Renesas Electronics
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1 | The IDT8T49N488I is a quad PLL with FemtoClock® NG technology, integrating low phase noise Frequency Translator / Synthesizer, Jitter attenuator, and alarm and monitoring functions suitable for networking and communications applications. The device has four fully independent PLLs, each PLL is able to generate any output frequency in the 0.98MHz - 312.5MHz range and most output frequencies in the 312.5MHz - 1,300MHz range. A wide range of input reference clocks and operation reference clock may be used as th | BGA | Check Price & Stock |
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621MLFT
Renesas Electronics
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1 | The 621 is a low skew, single input to four output, clock buffer. The device operates from a single 1.2 to 1.8 volt supply and has a 3.3 volt tolerant input, making it ideal for level translation. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. | Small Outline Packages | Check Price & Stock |
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8530DYLF/W
Renesas Electronics
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1 | The 8530 is a low skew, 1-to-16 Differential-to- 2.5V LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to-peak input voltages as small as 150mV, as long as the common mode voltage is within the specified minimum and maximum range. Guaranteed output and part-to-part skew characteristics make the 8530 ideal for those clock distribution applications demanding well defined performance and repeatability. | Quad Flat Packages | Check Price & Stock |
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2510CGLF
Renesas Electronics
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1 | The 2510C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The 2510C operates at 3.3V VCC and drives up to ten clock loads. | Small Outline Packages | Check Price & Stock |
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9DBU0741AKILF
Renesas Electronics
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1 | The 9DBU0741 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated terminations for direct connection to 100 ohm transmission lines. The device has 7 output enables for clock management, and 3 selectable SMBus addresses. | Quad Flat No-Lead | Check Price & Stock |
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8316AKLF
Renesas Electronics
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1 | The 8316 is a low skew, 1-to-16 LVCMOS/LVTTL Fanout Buffer with 1.2V LVCMOS Outputs and a member of the family of High Performance Clock Solutions from IDT. The 8316 single ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. Guaranteed output and part-to-part skew characteristics along with the 1.2V output makes the 8316 ideal for high performance, single ended applications that also require a li | Quad Flat No-Lead | Check Price & Stock |
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527R-01ILF
Renesas Electronics
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1 | The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MH | Small Outline Packages | Check Price & Stock |
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8T349316NLGI
Renesas Electronics
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1 | The 8T349316 is a 2.5V differential clock buffer with sixteen LVDS outputs. The fanout from a differential input to the sixteen LVDS outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The 8T349316 can act as a translator from a differential HSTL, LVPECL, CML or LVDS input to LVDS output signals. A single-ended 3.3V, 2.5V LVCMOS/LVTTL input can also be used to translate to LVDS outputs. The redundant input capability allows for an asynchronous change-over fr | Quad Flat No-Lead | Check Price & Stock |
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74FCT3807SPGGI8
Renesas Electronics
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1 | The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer. The 74FCT3807S has best in class additive phase Jitter of sub 50 fsec. | Small Outline Packages | Check Price & Stock |
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670M-04ILFT
Renesas Electronics
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1 | The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The ICS670-04 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communicatio | Small Outline Packages | Check Price & Stock |
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527R-01ILFT
Renesas Electronics
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1 | The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MH | Small Outline Packages | Check Price & Stock |
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854S057BGILFT
Renesas Electronics
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1 | The 854S057BI is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, nPCLK pairs can accept most standard differential input levels. Internal termination is provided on each differential input pair. The 854S057BI operates using a 2.5V supply voltage. The fully differential architecture and low propagation delay make it ideal for use in high speed multiplexing applications. The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the inte | Small Outline Packages | Check Price & Stock |
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86004BGILF
Renesas Electronics
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1 | The 86004I is a high performance 1:4 LVCMOS/LVTTL Clock Buffer. The 86004I has a fully integrated PLL and can be configured as zero delay buffer and has an input and output frequency range of 15.625MHz to 62.5MHz. The VCO operates at a frequency range of 250MHz to 500MHz. The external feedback allows the device to achieve "zero delay" between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed | Small Outline Packages | Check Price & Stock |
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9DBL0853ANDGI8
Renesas Electronics
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1 | The 9DBL0853 Zero-Delay/Fanout buffer is a low-power high-performance member of Renesas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0851. For information regarding evaluation boards and material, please contact your local sales representative. | Quad Flat No-Lead | Check Price & Stock |
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9ZXL1530BKLF
Renesas Electronics
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1 | The 9ZXL1530 is a low-power version of the 9ZX21501. It has 15 low-power HCSL-compatible outputs and meets all the performance requirements of the Intel DB1900Z specification, while reducing power consumption more than 50% from the original IDT9ZX21501. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications. | Quad Flat No-Lead | Check Price & Stock |
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97ULP845AHLF
Renesas Electronics
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1 | Low skew, low jitter PLL clock driver; 1 to 5 differential clock distribution (SSTL_18) | BGA | Check Price & Stock |
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9ZXL0852EKILF
Renesas Electronics
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1 | The 9ZXL0852E is a second-generation, enhanced performance DB800ZL differential buffer. The part is pin-compatible to the 9ZXL0851A while offering a much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. The 9ZXL0852E has an SMBus Write Lockout pin for increased device and system security. | Quad Flat No-Lead | Check Price & Stock |
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851S201CKILF
Renesas Electronics
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1 | The 851S201I is a high performance 2:2 Differential-to-HCSL Multiplexer with a 2 output fanout buffer. The 851S201I operates up to 250MHz and accepts HCSL and other low level differential inputs levels. Input level detection circuitry is available to flag input levels that drops below a specified value and on the selected input. This signal is latched until the status is reset via the alarm reset input. The 851S201I is packaged in a small 3 x 3 mm 16 lead VFQFN package, making it ideal for use on space cons | Quad Flat No-Lead | Check Price & Stock |
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