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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72413L25SOG Renesas Electronics	1	The 72413 is a 64 x 5, high-speed First-In/First-Out memory. It is expandable in bit width. All speed versions are cascadable in depth. It is ideal for use in high-speed data buffering applications. This FIFO can be used as a rate buffer, between two digital systems of varying data rates, in high-speed tape drivers, hard disk controllers, data communications controllers and graphics controllers.	Small Outline Packages	72413L25SOG	3D model available Symbol and footprint available 3	1 Download Model
	72V83L20PAGI8 Renesas Electronics	1	The 72V83 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	72V83L20PAGI8	3D model available Symbol and footprint available 3	1 Download Model
	72265LA10TFG8 Renesas Electronics	1	The 72265 is a 16K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data	Quad Flat Packages	72265LA10TFG8	3D model available Symbol and footprint available 3	1 Download Model
	7208L20JG Renesas Electronics	1	The 7208 is a 64K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	7208L20JG	3D model not available Symbol and footprint available 2	1 Download Model

	7282L12PAG8 Renesas Electronics	1	The 7282 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7282L12PAG8	3D model available Symbol and footprint available 3	1 Download Model
	72V265LA15PFGI8 Renesas Electronics	1	The 72V265 is an 16K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72265 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that ne	Quad Flat Packages	72V265LA15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72T18105L10BB Renesas Electronics	1	The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T18105L10BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3632L15PFGI8 Renesas Electronics	1	The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	72V3632L15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PFG8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72T18105L4-4BBG Renesas Electronics	1	The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T18105L4-4BBG	3D model not available Symbol and footprint available 2	1 Download Model
	72V275L15PFG Renesas Electronics	1	The 72V275 is a 32K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72275 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee	Quad Flat Packages	72V275L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	IDT7204L12JG Renesas Electronics	1	IDT IDT7204L12JG, FIFO Memory, Dual 36kbit, 4K x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 32-Pin PLCC	Plastic Leaded Chip Carrier	IDT7204L12JG	3D model not available Symbol and footprint available 2	1 Download Model
	SN74V245-7PAG Texas Instruments	1	SN74V245-7PAG, FIFO Memory Dual 4K x 18 bit Uni-Directional 5ns 133MHz 3.3V 64-Pin TQFP	Quad Flat Packages	SN74V245-7PAG	3D model available Symbol and footprint available 3	1 Download Model
	SN74V273-7PZA Texas Instruments	1	FIFO 16384 x 18 Synch FIFO Memory	Quad Flat Packages	SN74V273-7PZA	3D model available Symbol and footprint available 3	1 Download Model
	CD74HCT40105M96 Texas Instruments	1	Texas Instruments CD74HCT40105M96, FIFO Memory 32MHz, 4.5 → 5.5 V, 16-Pin SOIC	Small Outline Packages	CD74HCT40105M96	3D model available Symbol and footprint available 3	1 Download Model

	IDT7201LA15JGI Renesas Electronics	1	IDT IDT7201LA15JGI, FIFO Memory, Dual 4kbit, 512 x 9 bit, Bi-Directional 15ns, 4.5 → 5.5 V, 32-Pin PLCC	Plastic Leaded Chip Carrier	IDT7201LA15JGI	3D model not available Symbol and footprint available 2	1 Download Model
	SN74ACT2235-30FN Texas Instruments	1	FIFO 1024 x 9 x 2 Asynchronous Bidirectional FIFO Memory 44-PLCC 0 to 70	Plastic Leaded Chip Carrier	SN74ACT2235-30FN	3D model not available Symbol and footprint available 2	1 Download Model
	SN74ACT7805-15DLR Texas Instruments	1	FIFO 256 x 18 synchronous FIFO memory	Small Outline Packages	SN74ACT7805-15DLR	3D model available Symbol and footprint available 3	1 Download Model
	SN74V215-20PAG Texas Instruments	1	FIFO 512 x 18 Synchronous FIFO Memory	Quad Flat Packages	SN74V215-20PAG	3D model available Symbol and footprint available 3	1 Download Model
	IDT72V06L25JGI Renesas Electronics	1	IDT IDT72V06L25JGI, FIFO Memory, Dual 144kbit, 16K x 9 bit, Bi-Directional 25ns, 3 → 3.6 V, 32-Pin PLCC	Plastic Leaded Chip Carrier	IDT72V06L25JGI	3D model available Symbol and footprint available 3	1 Download Model
	IDT7202LA12SOG Renesas Electronics	1	IDT IDT7202LA12SOG, FIFO Memory, Dual 9kbit, 1K x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 28-Pin SOIC	Small Outline Packages	IDT7202LA12SOG	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT2235-20PM Texas Instruments	1	FIFO 1024 x 9 x 2 Asynchronous Bidirectional FIFO Memory 64-LQFP 0 to 70	Quad Flat Packages	SN74ACT2235-20PM	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT7805-20DLR Texas Instruments	1	FIFO 256 x 18 synchronous FIFO memory	Small Outline Packages	SN74ACT7805-20DLR	3D model available Symbol and footprint available 3	1 Download Model
	SN74ALS232BFN Texas Instruments	1	IC FIFO ASYNC 4X16 20PLCC	Plastic Leaded Chip Carrier	SN74ALS232BFN	3D model available Symbol and footprint available 3	1 Download Model
	IDT7203L12TPG Renesas Electronics	1	IDT IDT7203L12TPG, FIFO Memory, Dual 18kbit, 2K x 9 bit, Bi-Directional 12ns, 4.5 → 5.5 V, 28-Pin PDIP	Dual-In-Line Packages	IDT7203L12TPG	3D model available Symbol and footprint available 3	1 Download Model
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