NB3V8 Model Download Search Results

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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V; VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO; 250 MHz Maximum Clock Frequency; Accepts LVCMOS, LVTTL Clock Inputs; 12 LVCMOS Clock Outputs; 150 ps Max. Skew Between Outputs; Temp. Range 40C to +85C; 32pin LQFP and QFN Packages; Synchronous Clock Enable Quad Flat Packages NB3V8312CFAG 1 Download Model
Part Image Part Image 1 VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V; VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO; 250 MHz Maximum Clock Frequency; Accepts LVCMOS, LVTTL Clock Inputs; 12 LVCMOS Clock Outputs; 150 ps Max. Skew Between Outputs; Temp. Range 40C to +85C; 32pin LQFP and QFN Packages; Synchronous Clock Enable Quad Flat No-Lead NB3V8312CMNR4G 1 Download Model
Part Image Part Image 1 NB3V8312CMNG, Clock Buffer, Maximum of 250 MHz, 32-Pin QFN Quad Flat No-Lead NB3V8312CMNG 1 Download Model
Part Image Part Image 1 Low Skew Clock Driver, NB3V Series, 12 True Output(s), 0 Inverted Output(s), PQFP32 NB3V8312CFAR2G 0 Build or Request
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