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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	APS6404L-3SQRX-SN apmemory	1	50Ω Output Drive Strength LVCMOS 1K Byte Wrapped Burst as long as tCEM is met Software Reset Ultra Low Power HalfsleepTM Mode with dataretention	Small Outline Packages	APS6404L-3SQRX-SN	3D model available Symbol and footprint available 3	1 Download Model
	HM628100LTTI-5SL Renesas Electronics	1	Renesas Electronics SRAM, HM628100LTTI-5SL- 8Mbit, 5	Small Outline Packages	HM628100LTTI-5SL	3D model available Symbol and footprint available 3	1 Download Model
	DS1225Y Dallas Logic	1	1225Y	Dual-In-Line Packages	DS1225Y	3D model available Symbol and footprint available 3	1 Download Model
	IS61WV204816ALL-12BLI Integrated Silicon Solution Inc.	1	SRAM 32Mb,High-Speed,Async,2Mbx16, 12ns, 1.65v-2.2v, 48 Ball mBGA (6x8 mm), RoHS	BGA	IS61WV204816ALL-12BLI	3D model available Symbol and footprint available 3	1 Download Model

	IS62WVS5128FALL-16NLI Integrated Silicon Solution Inc.	1	IC SRAM 4MBIT SPI/QUAD I/O 8SOIC	Small Outline Packages	IS62WVS5128FALL-16NLI	3D model available Symbol and footprint available 3	1 Download Model
	CY7C1009D-10VXIT Infineon	1	SRAM - Asynchronous Memory IC 1Mbit Parallel 10 ns 32-SOJ	Other	CY7C1009D-10VXIT	3D model not available Symbol and footprint available 2	1 Download Model
	IS66WVE4M16EBLL-70BLI Integrated Silicon Solution Inc.	1	SRAM 64Mb,Pseudo SRAM,Asynch/Page, 4M x 16,70ns,VDD 2.7V~3.6V, VDDQ 2.7V~3.6V,48 Ball BGA (6x8 mm), RoHS	BGA	IS66WVE4M16EBLL-70BLI	3D model available Symbol and footprint available 3	1 Download Model
	TC551001BPL-70L Toshiba	1	fhrvr	Dual-In-Line Packages	TC551001BPL-70L	3D model available Symbol and footprint available 3	1 Download Model
	IS62WV10248EBLL-55TLI Integrated Silicon Solution Inc.	1	1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM	Small Outline Packages	IS62WV10248EBLL-55TLI	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA166BQG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA166BQG	3D model available Symbol and footprint available 3	1 Download Model
	71V3579S75PFG Renesas Electronics	1	The 71V3579 3.3V CMOS SRAM is organized as 256K x 18. The 71V3579 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V3579S75PFG	3D model available Symbol and footprint available 3	1 Download Model
	7025L15JG Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Plastic Leaded Chip Carrier	7025L15JG	3D model not available Symbol and footprint available 2	1 Download Model
	70T659S15BC Renesas Electronics	1	The 70T659 is a high-speed 128K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T659S15BC	3D model available Symbol and footprint available 3	1 Download Model
	M48Z35Y-70PC1 STMicroelectronics	1	STMicroelectronics M48Z35Y-70PC1 NVRAM, 256kbit, 70ns, 5V 28-Pin PCDIP	Dual-In-Line Packages	M48Z35Y-70PC1	3D model available Symbol and footprint available 3	1 Download Model
	70T3599S133BCI Renesas Electronics	1	The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3599S133BCI	3D model available Symbol and footprint available 3	1 Download Model

	70T3519S133BFI8 Renesas Electronics	1	The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3519S133BFI8	3D model available Symbol and footprint available 3	1 Download Model
	71V30L35TF Renesas Electronics	1	The 71V30 high-speed 1K x 8 Dual-Port Static RAM is designed to be used as a stand-alone 8-bit Dual-Port SRAM. It has two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	71V30L35TF	3D model available Symbol and footprint available 3	1 Download Model
	5962-8855202UA Renesas Electronics	1	The 5962-88552 (71256 SRAM) is organized as 32K x 8. This part offers a reduced power standby mode for significant system level power and cooling savings. It also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Ceramic Dual-In-Line Packages	5962-8855202UA	3D model not available Symbol and footprint available 2	1 Download Model
	70V3389S4BC8 Renesas Electronics	1	The 70V3389 is a high-speed 64K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3389 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3389S4BC8	3D model available Symbol and footprint available 3	1 Download Model
	71T75602S166BG8 Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	BGA	71T75602S166BG8	3D model available Symbol and footprint available 3	1 Download Model
	70V9089L12PFGI8 Renesas Electronics	1	The 70V9089 is a high-speed 64K x 8 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V9089L12PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V2556S133PFGI Renesas Electronics	1	The 71V2556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2556 contains data I/O, address and control signal registers. It can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V2556S133PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71V67703S80PFG8 Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V67703S80PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71342LA25PFGI Renesas Electronics	1	The 71342 is a high-speed 4K x 8 Dual-Port Static RAM containing a fully independent semaphore logic block to assist in arbitrating between ports. This block contains unassigned flags which can be accessed by either side, however, only one side can control the flag at any time. An automatic power down feature, controlled by CE and SEM, permits the on-chip circuitry of each port to enter a very low standby power mode (both CE and SEM HIGH).	Quad Flat Packages	71342LA25PFGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75602S166BGG8 Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	BGA	71T75602S166BGG8	3D model available Symbol and footprint available 3	1 Download Model
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