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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71256L35YG Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Other	71256L35YG	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S85BQGI Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65703S85BQGI	3D model not available Symbol and footprint available 2	1 Download Model
	5962-8687515XA Renesas Electronics	1	The 5962-86875 (IDT 7130/40) is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with a "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with	Ceramic Dual-In-Line Packages	5962-8687515XA	3D model not available Symbol and footprint available 2	1 Download Model
	71V67603S166PFG Renesas Electronics	1	The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin.	Quad Flat Packages	71V67603S166PFG	3D model available Symbol and footprint available 3	1 Download Model

	7164L45TDB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164L45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	7025L55GB Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7025L55GB	3D model available Symbol and footprint available 3	1 Download Model
	7142LA35C Renesas Electronics	1	The 7142 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7132 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Ceramic Dual-In-Line Packages	7142LA35C	3D model not available Symbol and footprint available 2	1 Download Model
	71V3558S100PFG Renesas Electronics	1	The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3558S100PFG	3D model available Symbol and footprint available 3	1 Download Model
	70T3599S200BC8 Renesas Electronics	1	The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3599S200BC8	3D model available Symbol and footprint available 3	1 Download Model
	70T3599S166BF Renesas Electronics	1	The 70T3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3599S166BF	3D model available Symbol and footprint available 3	1 Download Model
	70T3589S133BCI Renesas Electronics	1	The 70T3589 is a high-speed 64K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3589 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3589S133BCI	3D model available Symbol and footprint available 3	1 Download Model
	71V65803S150BG Renesas Electronics	1	The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65803S150BG	3D model available Symbol and footprint available 3	1 Download Model
	71V416S15YG Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V416S15YG	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA150BG Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA150BG	3D model available Symbol and footprint available 3	1 Download Model
	71V67603S150BGGI Renesas Electronics	1	The 71V67603 3.3V CMOS SRAM is organized as 256K x 36. The 71V67603 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.The order of these three addresses are defined by the internal burst counter and the LBO input pin.	BGA	71V67603S150BGGI	3D model available Symbol and footprint available 3	1 Download Model

	709349L6PFG8 Renesas Electronics	1	The 709349 is a high-speed 4K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	709349L6PFG8	3D model available Symbol and footprint available 3	1 Download Model
	70V07S35G Renesas Electronics	1	The 70V07 is a high-speed 32K x 8 Dual-Port Static RAM designed to be used as a stand-alone 256K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-or-more word systems which results in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Other	70V07S35G	3D model available Symbol and footprint available 3	1 Download Model
	70T633S12BC8 Renesas Electronics	1	The 70T633 is a high-speed 512K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T633S12BC8	3D model available Symbol and footprint available 3	1 Download Model
	R1QBA7218ABG-22IA0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.DDR II / II+ (Double Data Rate) SRAMs and QDR^(TM) II / II+ (Quad Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. DDR SRAMs can provide double data rate (DDR) operation on each data pin in write or read	BGA	R1QBA7218ABG-22IA0	3D model available Symbol and footprint available 3	1 Download Model
	R1QBA7218ABG-22IB0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.DDR II / II+ (Double Data Rate) SRAMs and QDR^(TM) II / II+ (Quad Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. DDR SRAMs can provide double data rate (DDR) operation on each data pin in write or read	BGA	R1QBA7218ABG-22IB0	3D model available Symbol and footprint available 3	1 Download Model
	M48Z12-200PC1 STMicroelectronics	1	NVSRAM (Non-Volatile SRAM) Memory IC 16Kbit Parallel 200 ns 24-PCDIP, CAPHAT® 4.5V ~ 5.5V 0°C ~ 70°C (TA)	Ceramic Dual-In-Line Packages	M48Z12-200PC1	3D model not available Symbol and footprint available 2	1 Download Model
	70T651S10BF8 Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S10BF8	3D model available Symbol and footprint available 3	1 Download Model
	7008L20PFGI8 Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7008L20PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	R1LP0108ESF-5SI#B1 Renesas Electronics	1	The R1LP0108E Series is a family of low voltage 1-Mbit static RAMs organized as 131, 072-word by 8-bit, fabricated by Renesas’s high-performance 0. 15um CMOS and TFT technologies. The R1LP0108E Series has realized higher density, higher performance and low power consumption. The R1LP0108E Series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. It has been packaged in 32-pin SOP, 32-pin TSOP and 32-pin sTSOP.	Small Outline Packages	R1LP0108ESF-5SI#B1	3D model available Symbol and footprint available 3	1 Download Model
	R1QBA7218ABG-20IA0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.DDR II / II+ (Double Data Rate) SRAMs and QDR^(TM) II / II+ (Quad Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. DDR SRAMs can provide double data rate (DDR) operation on each data pin in write or read	BGA	R1QBA7218ABG-20IA0	3D model available Symbol and footprint available 3	1 Download Model
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