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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71T75902S75PFGI8 Renesas Electronics	1	The 71T75902 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround.	Quad Flat Packages	71T75902S75PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	7025L20G Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7025L20G	3D model available Symbol and footprint available 3	1 Download Model
	70V28L20PFG Renesas Electronics	1	The 70V28 is a high-speed 64K x 16 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or wider memory system applications resulting in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V28L20PFG	3D model available Symbol and footprint available 3	1 Download Model
	70V38L20PFGI Renesas Electronics	1	The 70V38 is a high-speed 64K x 18 Dual-Port Static RAM designed to be used as a stand-alone 576K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 36-bit or more word systems. This MASTER/SLAVE approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V38L20PFGI	3D model available Symbol and footprint available 3	1 Download Model

	71V416L10PHGI Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Small Outline Packages	71V416L10PHGI	3D model available Symbol and footprint available 3	1 Download Model
	70T3519S166BF8 Renesas Electronics	1	The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3519S166BF8	3D model available Symbol and footprint available 3	1 Download Model
	71V25761S183PFG Renesas Electronics	1	The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V25761S183PFG	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA166BGI Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA166BGI	3D model available Symbol and footprint available 3	1 Download Model
	70V3599S166BC8 Renesas Electronics	1	The 70V3599 is a high-speed 128K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3599 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3599S166BC8	3D model available Symbol and footprint available 3	1 Download Model
	R1RW0416DSB-2PI#D0 Renesas Electronics	1	The R1RW0416DI is a 4-Mbit High-Speed static RAM organized 256-kword × 16-bit. It has realized High-Speed access time by employing CMOS process (6-transistor memory cell) and High-Speed circuit designing technology. It is most appropriate for the application which requires High-Speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. The R1RW0416DI is packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.	Small Outline Packages	R1RW0416DSB-2PI#D0	3D model available Symbol and footprint available 3	1 Download Model
	71024S12YGI Renesas Electronics	1	The 71024 5V CMOS SRAM is organized as 128K x 8. All bidirectional inputs and outputs of the 71024 are TTL-compatible, and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71024S12YGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S100BGGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S100BGGI	3D model available Symbol and footprint available 3	1 Download Model
	R1LV0408DSB-5SI#B0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.Renesas is the worldwide #1 Low Power SRAM supplier with a full lineup and well balanced long term support. High density and high performance RAMs using Renesas's original technology, for example the Advanced LPSRAM new memory cell concept are offered.	Small Outline Packages	R1LV0408DSB-5SI#B0	3D model available Symbol and footprint available 3	1 Download Model
	7143SA70GB Renesas Electronics	1	The 7143 is a high-speed 2K x 16 Dual-Port Static RAMs. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7143SA70GB	3D model available Symbol and footprint available 3	1 Download Model
	70V658S10DRG Renesas Electronics	1	The 70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	Quad Flat Packages	70V658S10DRG	3D model available Symbol and footprint available 3	1 Download Model

	71V547S80PFGI8 Renesas Electronics	1	The 71V547 3.3V CMOS SRAM is organized as 128K x 36 bits. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turn-around. The 71V547 contains address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V547S80PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA150BGG8 Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA150BGG8	3D model available Symbol and footprint available 3	1 Download Model
	70125L25JG Renesas Electronics	1	The 70125 is a high-speed 2K x 9 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port together with the 70121 "MASTER" in 18-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit-or-wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power-down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode.	Plastic Leaded Chip Carrier	70125L25JG	3D model not available Symbol and footprint available 2	1 Download Model
	71321SA35TFG8 Renesas Electronics	1	The 71321 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 71421 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low sta	Quad Flat Packages	71321SA35TFG8	3D model available Symbol and footprint available 3	1 Download Model
	70V7519S133BCI8 Renesas Electronics	1	The 70V7519 is a high-speed 256K x 36 (9Mbit) synchronous Bank-Switchable Dual-Ported SRAM is organized into 64 independent 4Kx36 banks and has two independent ports with separate control, address, and I/O pins for each port, allowing each port to access any 4Kx36 memory block not already accessed by the other port. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70V7519S133BCI8	3D model available Symbol and footprint available 3	1 Download Model
	70V657S15BF Renesas Electronics	1	The 70V657 is a high-speed 32K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each por	BGA	70V657S15BF	3D model available Symbol and footprint available 3	1 Download Model
	71V016SA20YG8 Renesas Electronics	1	The 71V016 3.3V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71V016 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V016SA20YG8	3D model available Symbol and footprint available 3	1 Download Model
	70V06L20PFGI Renesas Electronics	1	The 70V06 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-or-more word systems which results in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V06L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	M48T35Y-70MH1F STMicroelectronics	1	5 V, 256 Kbit (32 Kb x 8) TIMEKEEPER® SRAM	Small Outline Packages	M48T35Y-70MH1F	3D model available Symbol and footprint available 3	1 Download Model
	7006S20G Renesas Electronics	1	The 7006 is a high-speed 16K x 8 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7006S20G	3D model available Symbol and footprint available 3	1 Download Model
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