SRAMs Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	CY62148ELL-45ZSXIT Infineon	1	SRAM 4Mb 45ns 512K x 8 Low Power SRAM	Small Outline Packages	CY62148ELL-45ZSXIT	3D model available Symbol and footprint available 3	1 Download Model
	IS61WV102416EDBLL-10TLI Integrated Silicon Solution Inc.	1	IC SRAM 16M PARALLEL 48TSOP	Small Outline Packages	IS61WV102416EDBLL-10TLI	3D model available Symbol and footprint available 3	1 Download Model
	70V3579S5BC8 Renesas Electronics	1	The 70V3579 is a high-speed 32K × 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3579 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3579S5BC8	3D model available Symbol and footprint available 3	1 Download Model
	71V65903S80BQ Renesas Electronics	1	The 71V65903 3.3V CMOS SRAM is organized as 512K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65903 contain address, data-in and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65903S80BQ	3D model available Symbol and footprint available 3	1 Download Model

	7164S45TDB Renesas Electronics	1	The 7164 5V CMOS SRAM is organized as 8K x 8. The 7164 offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	7164S45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	71T75602S133BG8 Renesas Electronics	1	The 71T75602 2.5V CMOS Synchronous SRAM organized as 512K x 36 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75602 contains data I/O, address and control signal registers.	BGA	71T75602S133BG8	3D model available Symbol and footprint available 3	1 Download Model
	71V3559S85BGI8 Renesas Electronics	1	The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	BGA	71V3559S85BGI8	3D model available Symbol and footprint available 3	1 Download Model
	6116LA70DB Renesas Electronics	1	The 6116 5V CMOS SRAM is organized as 2K x 8. The 6116 offers a reduced power standby mode.The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1μW to 4μW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.	Dual-In-Line Packages	6116LA70DB	3D model available Symbol and footprint available 3	1 Download Model
	71V35761SA166BQG Renesas Electronics	1	The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM.	BGA	71V35761SA166BQG	3D model available Symbol and footprint available 3	1 Download Model
	71V35761SA166BQG8 Renesas Electronics	1	The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM.	BGA	71V35761SA166BQG8	3D model available Symbol and footprint available 3	1 Download Model
	70T3519S200BCG Renesas Electronics	1	The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3519S200BCG	3D model available Symbol and footprint available 3	1 Download Model
	R1QBA7236ABG-20IA0 Renesas Electronics	1	Support is limited to customers who have already adopted these products.DDR II / II+ (Double Data Rate) SRAMs and QDR^(TM) II / II+ (Quad Data Rate) SRAMs are the ideal memory devices for next generation networking and communications systems. These ultra-fast devices can support high bandwidth systems that require memories capable of very high operating frequencies combined with low latencies and full cycle utilization. DDR SRAMs can provide double data rate (DDR) operation on each data pin in write or read	BGA	R1QBA7236ABG-20IA0	3D model available Symbol and footprint available 3	1 Download Model
	71256L45TDB Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Ceramic Dual-In-Line Packages	71256L45TDB	3D model not available Symbol and footprint available 2	1 Download Model
	R1RP0416DSB-0PI#D1 Renesas Electronics	1	The R1RP0416DI Series is a 4-Mbit High-Speed static RAM organized 256-k word × 16-bit. It has realized High-Speed access time by employing CMOS process (6-transistor memory cell) and High-Speed circuit designing technology. It is most appropriate for the application which requires High-Speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 44-pin plastic SOJ and 400-mil 44-pin plastic TSOPII.	Small Outline Packages	R1RP0416DSB-0PI#D1	3D model available Symbol and footprint available 3	1 Download Model
	7005S35G Renesas Electronics	1	The 7005 is a high-speed 8K x 8 Dual-Port Static RAM designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7005S35G	3D model available Symbol and footprint available 3	1 Download Model

	70T653MS12BCGI Renesas Electronics	1	The 70T653M is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone 18874K-bit Dual-Port RAM. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T653MS12BCGI	3D model available Symbol and footprint available 3	1 Download Model
	709099L9PFGI Renesas Electronics	1	The 709099 is a high-speed 128K x 8 bit synchronous Dual- Port RAM. Registers on control, data, and address inputs provide minimal setup and hold times allowing systems to be designed with very short cycle times. With an input data register, it has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	709099L9PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7025L15JG8 Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Plastic Leaded Chip Carrier	7025L15JG8	3D model not available Symbol and footprint available 2	1 Download Model
	71V2546S133BG8 Renesas Electronics	1	The 71V2546 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2546 has an on-chip burst counter. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V2546S133BG8	3D model available Symbol and footprint available 3	1 Download Model
	71V65703S80PFGI Renesas Electronics	1	The 71V65703 3.3V CMOS SRAM is organized as 256K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65703 contain address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	Quad Flat Packages	71V65703S80PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7008L20PFGI Renesas Electronics	1	The 7008 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	7008L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	70T3519S133BFI Renesas Electronics	1	The 70T3519 is a high-speed 256K x 36 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70T3519 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 2.5V.	BGA	70T3519S133BFI	3D model available Symbol and footprint available 3	1 Download Model
	7052S35G Renesas Electronics	1	The 7052 is a high-speed 2K x 8 FourPort™ Static RAM to be used where multiple access into a common RAM is required. It is designed for systems where on-chip hardware port arbitration is not needed and has four independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low power standby power mode. Milita	Other	7052S35G	3D model available Symbol and footprint available 3	1 Download Model
	71024S20TYG Renesas Electronics	1	The 71024 5V CMOS SRAM is organized as 128K x 8. All bidirectional inputs and outputs of the 71024 are TTL-compatible, and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.	Other	71024S20TYG	3D model available Symbol and footprint available 3	1 Download Model
	70V9099L9PFG Renesas Electronics	1	The 70V9099 is a high-speed 128K x 8 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V9099L9PFG	3D model available Symbol and footprint available 3	1 Download Model
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