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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	49FCT3805ASOGI8 Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805ASOGI8	3D model available Symbol and footprint available 3	1 Download Model
	9ZXL0651AKLF Renesas Electronics	1	The 9ZXL0651 is a low-power 6-output differential buffer that meets all the performance requirements of the Intel DB1200Z specification. It consumes 50% less power than standard HCSL devices and has internal terminations to allow direct connection to 85 ohm transmission lines. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications.	Quad Flat No-Lead	9ZXL0651AKLF	3D model available Symbol and footprint available 3	1 Download Model
	2309NZ-1HDCGI Renesas Electronics	1	The IDT2309NZ is a low-cost buffer designed to distribute high-speed clocks in mobile PC systems and desktop PC systems with SDRAM support. This part has nine outputs, eight of which can be used to drive two DIMMs or four SO-DIMMs, and the remaining can be used for external feedback to a PLL. The IDT2309NZ operates at 3.3V and outputs can run up to 133.33MHz The IDT2309NZ is designed for low EMI and power optimization. It has multiple VDD and VSS pins for noise optimization and consumes less than 32mA at 66	Small Outline Packages	2309NZ-1HDCGI	3D model available Symbol and footprint available 3	1 Download Model
	8741004BGILFT Renesas Electronics	1	The 8741004I is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express®™ systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 8741004I has 3 PLL bandwid	Small Outline Packages	8741004BGILFT	3D model available Symbol and footprint available 3	1 Download Model

	9DMV0131BKILFT Renesas Electronics	1	The 9DMV0131 is a member of Renesas' SOC-Friendly 1.8 V Very-Low-Power (VLP) PCIe Gen1–5 family. The output has an OE# pin for optimal system control and power management. The part provides asynchronous or glitch-free switching modes.	Quad Flat No-Lead	9DMV0131BKILFT	3D model available Symbol and footprint available 3	1 Download Model
	663MILF Renesas Electronics	1	The IDT663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the IDT674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies. The phase detector and VCO functions of the device can also be used independently. This enables the config	Small Outline Packages	663MILF	3D model available Symbol and footprint available 3	1 Download Model
	23S08E-4DCGI Renesas Electronics	1	3.3V Zero Delay Clock Multiplier, Spread Spectrum Compatible	Small Outline Packages	23S08E-4DCGI	3D model available Symbol and footprint available 3	1 Download Model
	8P34S1212NLGI Renesas Electronics	1	The 8P34S1212 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals. The 8P34S1212 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1212 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable diffe	Quad Flat No-Lead	8P34S1212NLGI	3D model available Symbol and footprint available 3	1 Download Model
	2510CGT-CQ0 Renesas Electronics	1	The 2510C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The 2510C operates at 3.3V VCC and drives up to ten clock loads.	Small Outline Packages	2510CGT-CQ0	3D model available Symbol and footprint available 3	1 Download Model
	8535AGI-01LF Renesas Electronics	1	The 8535I-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The 8535I-01 has two single ended clock inputs. the single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8535I-01 ideal for those applications d	Small Outline Packages	8535AGI-01LF	3D model available Symbol and footprint available 3	1 Download Model
	8P34S2106AHGI Renesas Electronics	1	The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V / 2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make th	BGA	8P34S2106AHGI	3D model available Symbol and footprint available 3	1 Download Model
	8P34S2106AHGI8 Renesas Electronics	1	The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V / 2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make th	BGA	8P34S2106AHGI8	3D model available Symbol and footprint available 3	1 Download Model
	9DB106BFLFT Renesas Electronics	1	The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.	Small Outline Packages	9DB106BFLFT	3D model available Symbol and footprint available 3	1 Download Model
	8545AGI-02LF Renesas Electronics	1	The 8545I-02 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS) the 8545I-02 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100Ω. The 8545I-02 accepts an LVCMOS/LVTTL input level and translates it to 3.3V LVDS output levels. Guaranteed output and part-to-part skew characteristics make the 8545I-02 id	Small Outline Packages	8545AGI-02LF	3D model available Symbol and footprint available 3	1 Download Model
	524MILFT Renesas Electronics	1	The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.	Small Outline Packages	524MILFT	3D model available Symbol and footprint available 3	1 Download Model

	49FCT3805QGI Renesas Electronics	1	The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where si	Small Outline Packages	49FCT3805QGI	3D model available Symbol and footprint available 3	1 Download Model
	49FCT3805DQGI8 Renesas Electronics	1	The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3	Small Outline Packages	49FCT3805DQGI8	3D model available Symbol and footprint available 3	1 Download Model
	8735BKI-21LF Renesas Electronics	1	The 8735BI-21 is a highly versatile 1:1 Differential-to-3.3V LVPECL clock generator. The CLK, nCLK pair can accept most standard differential input levels. The 8735BI-21 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The referencedivider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The ex	Quad Flat No-Lead	8735BKI-21LF	3D model available Symbol and footprint available 3	1 Download Model
	552-02SCMGI8 Renesas Electronics	1	The 552-02S is a low skew, single-input to eight-output clock buffer. The device offers a dual input with pin select for switching between two clock sources. It has best in class Additive Phase Jitter of sub 50 fsec.	Quad Flat No-Lead	552-02SCMGI8	3D model available Symbol and footprint available 3	1 Download Model
	74FCT3807EQGI Renesas Electronics	1	The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.	Small Outline Packages	74FCT3807EQGI	3D model available Symbol and footprint available 3	1 Download Model
	8P34S1102NLGI Renesas Electronics	1	The 8P34S1102 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals. The 8P34S1102 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1102 ideal for those clock distribution applications demanding well-defined performance and repeatability. One differential inp	Quad Flat No-Lead	8P34S1102NLGI	3D model available Symbol and footprint available 3	1 Download Model
	8T79S308NLGI8 Renesas Electronics	1	The 8T79S308 is a fully integrated signal fanout buffer for high-performance, low additive phase noise applications. The main function of the device is the distribution and fanout of high-frequency clocks or low-frequency synchronization signals. The 8T79S308 is optimized to deliver very low phase noise clocks and precise, low-skew outputs, low device-to-device skew characteristics and fast output rise/fall times help the system design to achieve deterministic clock phase relationship across devices.The dev	Quad Flat No-Lead	8T79S308NLGI8	3D model available Symbol and footprint available 3	1 Download Model
	MK1575-01GILFTR Renesas Electronics	1	The MK1575-01 is a clock recovery Phase-Locked Loop (PLL) designed for clock synthesis and synchronization in cost sensitive applications. The device is optimized to accept a low-frequency reference clock to generate a high-frequency data or graphics pixel clock. External loop filter components allow tailoring of loop frequency response characteristics. For low jitter / phase noise requirements refer to the MK2069 products.	Small Outline Packages	MK1575-01GILFTR	3D model available Symbol and footprint available 3	1 Download Model
	9DMU0141AKILF Renesas Electronics	1	The 9DMU0141 is a member of IDT's SOC-Friendly 1.5 V Ultra-Low-Power (ULP) PCIe Gen1-2-3 family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The output has an OE# pin for optimal system control and power management. The part provides asynchronous or glitch-free switching modes.	Quad Flat No-Lead	9DMU0141AKILF	3D model available Symbol and footprint available 3	1 Download Model
	9DB1233AGLFT Renesas Electronics	1	The 9DB1233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.	Small Outline Packages	9DB1233AGLFT	3D model available Symbol and footprint available 3	1 Download Model
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