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Image Part Number D.S Description Package Category Prices / Stock Model Action
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74FCT3807EQGI Renesas Electronics
1 The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. Small Outline Packages 74FCT3807EQGI 1 Download Model
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RC19308AGNA#BB0 Renesas Electronics
1 Very Low Additive Phase Jitter:• PCIe Gen5 CC: 6.9fs RMS (typ)• PCIe Gen6 CC: 4.1fs RMS (typ)• PCIe Gen7 CC: 2.9fs RMS (typ)• DB2000Q: 11.5fs RMS (typ)• 12kHz - 20MHz (156.25MHz): 42.8fs RMS (typ)▪ 2:N or dual x 1:N/2 modes (N is number of outputs)▪ Power Down Tolerant (PDT) inputs▪ Flexible Startup Sequencing (FSS)▪ Automatic Clock Parking (ACP) upon loss ofselected CLKIN▪ Spread-spectrum tolerant▪ CLKIN accepts HCSL or LVDS signal levels▪ Dedicated OEb pin per output▪ -40 to +1 Quad Flat No-Lead RC19308AGNA#BB0 1 Download Model
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9DB106BFLFT Renesas Electronics
1 The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications. Small Outline Packages 9DB106BFLFT 1 Download Model
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9DBL0641CKILF Renesas Electronics
1 The 9DBL0641 6-output zero-delay/fan-out buffer is a 3.3V member of Renesas' Full-Featured PCIe family. The 9DBL0641 supports PCIe Gen1 through Gen5 and both Common and Independent Reference Clock architectures. For information regarding evaluation boards and material, please contact your local sales representative. Quad Flat No-Lead 9DBL0641CKILF 1 Download Model
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9ZX21901BKLF Renesas Electronics
1 The 9ZX21901B is a version of the Intel DB1900Z Differential Buffer with an adjustable external feedback path allowing the user to eliminate trace delays from their design.  It is suitable for PCIe Gen3 or QPI applications. The part is backwards compatible to PCIe Gen1 and Gen2. The device maintains low drift for critical QPI applications. In bypass mode, the IDT9ZX21901 can provide outputs up to 400MHz. See the 9ZX21901C for a fixed external feedback path. Quad Flat No-Lead 9ZX21901BKLF 1 Download Model
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8SLVD1212ANLGI Renesas Electronics
1 The 8SLVD1212 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVD1212 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVD1212 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and twelve low skew outputs are available. Quad Flat No-Lead 8SLVD1212ANLGI 1 Download Model
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524MILFT Renesas Electronics
1 The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Small Outline Packages 524MILFT 1 Download Model
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49FCT3805DQGI8 Renesas Electronics
1 The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputsand complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3 Small Outline Packages 49FCT3805DQGI8 1 Download Model
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8735BKI-21LF Renesas Electronics
1 The 8735BI-21 is a highly versatile 1:1 Differential-to-3.3V LVPECL clock generator. The CLK, nCLK pair can accept most standard differential input levels. The 8735BI-21 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The referencedivider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The ex Quad Flat No-Lead 8735BKI-21LF 1 Download Model
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8545AG-02LF Renesas Electronics
1 The 8545-02 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer and a member of the  family of High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS) the 8545-02 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100Ω. The 8545-02 accepts an LVCMOS/LVTTL input level and translates it to 3.3V LVDS output levels. Guaranteed output and part-to-part skew characteristics make the 8545-02 ideal Small Outline Packages 8545AG-02LF 1 Download Model
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9DBU0841AKILF Renesas Electronics
1 The 9DBU0841 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The device has 8 output enables for clock management and 3 selectable SMBus addresses. Quad Flat No-Lead 9DBU0841AKILF 1 Download Model
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RC19013AGNG#KB0 Renesas Electronics
1 The RC19013 is a 13-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19013 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design.  Quad Flat No-Lead RC19013AGNG#KB0 1 Download Model
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23S09E-1DCG Renesas Electronics
1 3.3V Zero Delay Clock Buffer, Spread Spectrum Compatible Small Outline Packages 23S09E-1DCG 1 Download Model
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83026BGI-01LF Renesas Electronics
1 The 83026I-01 is a low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Fanout Buffer. The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two single-ended LVCMOS/LVTTL outputs. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space. Small Outline Packages 83026BGI-01LF 1 Download Model
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8525BGLFT Renesas Electronics
1 The 8525 is a low skew, high performance 1-to-4 LVCMOS-to-LVHSTL fanout buffer. The 8525 has two selectable clock inputs thataccept LVCMOS or LVTTL input levels and translate them to LVHSTL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8525 ideal for those applications demanding well defined performance and repeatability. Small Outline Packages 8525BGLFT 1 Download Model
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551SCMGI8 Renesas Electronics
1 The 551S is a low cost, high-speed single input to four output LVCMOS clock buffer. The 551S has best in class Additive Phase Jitter of sub 50 fsec. Small Outline No-lead 551SCMGI8 1 Download Model
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83052AGI-01LFT Renesas Electronics
1 The 83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a member of the family of High Performance Clock Solutions from IDT. The 83052I-01 has two selectable single-ended clock inputs and two single-ended clock outputs. The output has a VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up Small Outline Packages 83052AGI-01LFT 1 Download Model
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74FCT3807DQGI Renesas Electronics
1 The FCT3807 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. Small Outline Packages 74FCT3807DQGI 1 Download Model
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551SCMGI Renesas Electronics
1 The 551S is a low cost, high-speed single input to four output LVCMOS clock buffer. The 551S has best in class Additive Phase Jitter of sub 50 fsec. Small Outline No-lead 551SCMGI 1 Download Model
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CDC351IDBR Texas Instruments
1 IC CLK BUFFER 1:10 100MHZ 24SSOP Small Outline Packages CDC351IDBR 1 Download Model
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74FCT3807AQGI Renesas Electronics
1 The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. Small Outline Packages 74FCT3807AQGI 1 Download Model
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831752AGILF Renesas Electronics
1 The 831752I is a high-performance, differential HCSL clock switch. The device is designed for the routing of PCIe clock signals in ATCA/AMC system and is optimized for PCIe Gen 1, Gen 2 and Gen 3. The device has one differential, bi-directional I/O (FCLK) for connection to ATCA clock sources and to clock receivers through a connector. The differential clock input CLK is the local clock input and the HCSL output Q is the local clock output. In the common clock mode, FCLK serves as an input and is routed to t Small Outline Packages 831752AGILF 1 Download Model
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9DBV0631BKILFT Renesas Electronics
1 The 9DBV0631 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock management and 3 selectable SMBus addresses. Quad Flat No-Lead 9DBV0631BKILFT 1 Download Model
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9DB1233AGLFT Renesas Electronics
1 The 9DB1233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. Small Outline Packages 9DB1233AGLFT 1 Download Model
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9DBV0531AKILFT Renesas Electronics
1 The 9DBV0531is a member of IDT's Full-Featured PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. Quad Flat No-Lead 9DBV0531AKILFT 1 Download Model
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