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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72221L15PFGI Renesas Electronics	1	The 72221SyncFIFO™ is a 1K x 9 First-In, First-Out memory with clocked read and write controls. This FIFO is useful for a wide variety of data buffering needs such as graphics, local area networks and interprocessor communication. These FIFOs have 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.	Quad Flat Packages	72221L15PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7205L15TPGI Renesas Electronics	1	The 7205 is a 8K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Dual-In-Line Packages	7205L15TPGI	3D model available Symbol and footprint available 3	1 Download Model
	72T1885L4-4BB Renesas Electronics	1	The 72T1885 is a 32K x 18 / 64K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T1885L4-4BB	3D model available Symbol and footprint available 3	1 Download Model
	72V3690L6BB Renesas Electronics	1	The 72V3690 32K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3690L6BB	3D model available Symbol and footprint available 3	1 Download Model

	7283L15PAGI Renesas Electronics	1	The 7283 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7283L15PAGI	3D model available Symbol and footprint available 3	1 Download Model
	72T36105L5BBI Renesas Electronics	1	The 72T36105 is a 64K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T36105L5BBI	3D model available Symbol and footprint available 3	1 Download Model
	72V3680L7-5BB Renesas Electronics	1	The 72V3680 16K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V3680L7-5BB	3D model available Symbol and footprint available 3	1 Download Model
	72V36110L6BB8 Renesas Electronics	1	The 72V36110 128K x 36 SuperSync II FIFO memory with clocked read and write controls offers flexible Bus-Matching x36/x18/x9 data flow and Asynchronous/Synchronous translation on the read or write ports ; SuperSync II FIFO's are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes.	BGA	72V36110L6BB8	3D model available Symbol and footprint available 3	1 Download Model
	72413L25SOG Renesas Electronics	1	The 72413 is a 64 x 5, high-speed First-In/First-Out memory. It is expandable in bit width. All speed versions are cascadable in depth. It is ideal for use in high-speed data buffering applications. This FIFO can be used as a rate buffer, between two digital systems of varying data rates, in high-speed tape drivers, hard disk controllers, data communications controllers and graphics controllers.	Small Outline Packages	72413L25SOG	3D model available Symbol and footprint available 3	1 Download Model
	7207L20DB Renesas Electronics	1	The 7207 is a 32K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7207L20DB	3D model not available Symbol and footprint available 2	1 Download Model
	74HC40105D,653 Nexperia	1	74HC40105 - 4-bit x 16-word FIFO register@en-us	Small Outline Packages	74HC40105D,653	3D model available Symbol and footprint available 3	1 Download Model
	72V265LA15PFGI8 Renesas Electronics	1	The 72V265 is an 16K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72265 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that ne	Quad Flat Packages	72V265LA15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72T18105L10BB Renesas Electronics	1	The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T18105L10BB	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PFG8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72T18105L4-4BBG Renesas Electronics	1	The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.	BGA	72T18105L4-4BBG	3D model not available Symbol and footprint available 2	1 Download Model

	72V275L15PFG Renesas Electronics	1	The 72V275 is a 32K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72275 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that nee	Quad Flat Packages	72V275L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	SN74V3640-7PEU Texas Instruments	1	FIFO 1024 x 36 Synch FIFO Memory	Quad Flat Packages	SN74V3640-7PEU	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT2229DWR Texas Instruments	1	Synchronous FIFO 512 (256 x 1 x 2) Uni-Directional 60MHz 9ns 28-SOIC	Small Outline Packages	SN74ACT2229DWR	3D model available Symbol and footprint available 3	1 Download Model
	IDT72V245L10PFG Renesas Electronics	1	IDT IDT72V245L10PFG, FIFO Memory, Dual 72kbit, 4K x 18 bit, Uni-Directional 10ns, 3 → 3.6 V, 64-Pin TQFP	Quad Flat Packages	IDT72V245L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V3640L6BBG8 Renesas Electronics	1	FIFO 1K x 36 SuperSync II FIFO, 3.3V	BGA	72V3640L6BBG8	3D model available Symbol and footprint available 3	1 Download Model
	SN74V273-6PZA Texas Instruments	1	FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 18/32K x 9 80-Pin LQFP Tray	Quad Flat Packages	SN74V273-6PZA	3D model available Symbol and footprint available 3	1 Download Model
	SN74V273-10PZA Texas Instruments	1	FIFO 16384 x 18 Synch FIFO Memory	Quad Flat Packages	SN74V273-10PZA	3D model available Symbol and footprint available 3	1 Download Model
	SN74ACT7811-20FN Texas Instruments	1	IC SYNC FIFO MEM 1024X18 68-PLCC	Plastic Leaded Chip Carrier	SN74ACT7811-20FN	3D model available Symbol and footprint available 3	1 Download Model
	SN74ALVC7805-40DLR Texas Instruments	1	FIFO 256 x 18 3.3-V Synch FIFO Memory	Small Outline Packages	SN74ALVC7805-40DLR	3D model available Symbol and footprint available 3	1 Download Model
	SN74S225N Texas Instruments	1	FIFO Mem Async Dual Width Uni-Dir 16 x 5 20-Pin PDIP Tube	Dual-In-Line Packages	SN74S225N	3D model available Symbol and footprint available 3	1 Download Model
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